Arm Limited

Advanced Risc Machines Limited

Siemens Aktiengesellschaft

University of Michigan

Inmos Limited

Philips Electronics N.v.

Matra Mhs S.a.

David Walter Flynn

James Edward Myers

Parameshwarappa Anand Kumar Savanth

Bal S Sandhu

Sachin Satish Idgunji

David William Howard

John Philip Biggs

Robert Campbell Aitken

Shidhartha Das

David Michael Bull

Gerard Richard Williams

Pranay Prabhat

Carsten Tradowsky

Andrew Michael Jones

Krisztian Flautner

Trevor N Mudge

Marlin Wayne Frederick, Jr

David James Seal

Dhrumil Gandhi

Gregory Munson Yeric

Ashley Miles Stevens

Wilco Dijkstra

David Terrence Matheny

Vasan Venkataraman

Michael Robert Nonweiler

Dipesh Ishwerbhai Patel

Alexander Stewart Weddell

Thomas Niedermeier

Michael Peter Muller

Tan Ba Tran

Rohan Gaddh

Lance Gregory Howarth

Rohit Grover

Philip Brian Endecott

Bruno Douady

Peter Klapproth

Peter Rohm

Jacobus Christophorus Koot

Frederik Zandveld

James Graham Matthew

Richard Schmid

Satchin Satish Idgunji

Leah Elizabeth Schuth

Kim Rasmussen

A data buffer comprises data storage circuitry; input circuitry to input data to be stored by the data storage circuitry at a first operating voltage; output circuitry to output stored data from the data storage circuitry at a second operating voltage different to the first operating voltage; and control circuitry to control an operating voltage of the data storage circuitry to be substantially the first operating voltage during a data input operation by the input circuitry and to be substantially the second operating voltage during a data output operation by the output circuitry.

Data buffer with two different operating voltages for input and output circuitry

Broadly speaking, embodiments of the present techniques provide a voltage monitoring circuit for low power minimum-energy sensor nodes. The circuit comprises sensing circuitry to sense a monitored signal having a plurality of operating signal states; a first comparator having a first input for receiving an upper threshold signal; and a second comparator having a first input for receiving a lower threshold signal, the upper and lower threshold signals defining a range which includes at least one signal state of the plurality of operating states of the monitored signal, wherein the first and second comparators have a bias input for receiving a bias configuration setting, the bias configuration setting being selectable according to an operating signal state of the monitored signal.

Monitoring circuit and method

An electronic devicehas at least one harvesting unitfor harvesting power from ambient energy. At least one circuit, including processing circuitry, is supplied with power from the harvesting unit. Control circuitryis provided to adjust at least one property of the processing circuitryor the at least one harvesting unitto reduce impedance mismatch between an output impedance of the harvesting unitand an input impedance of the at least one circuit

Harvesting power from ambient energy in an electronic device

An interface device for a data processing system is provided. The interface device comprises first interface circuitry to receive incoming data and second interface circuitry to transmit processed data to a data store for storage. The interface device is provided with processing circuitry to generate the processed data from the incoming data wherein the processing carried out reduces the data in size. The processing circuitry is also responsive to at least one characteristic of the incoming data or the processed data to transmit a notification signal to a data processing component of the data processing system.

Interface device for a data processing system

A storage bitcell comprising a first inverter cross-coupled with a second inverter, both the first and second inverter being in a path between a first potential and a second potential; wherein a first isolator is connected in the path between the first inverter and the first potential. The storage bitcell has particular application as Static Random-Access Memory (SRAM) circuitry.

Storage bitcell

A data transfer system, a method of data transfer and a corresponding transmitter and receiver are disclosed. A communication protocol between the transmitter and receiver is defined using a set of valid transmission states for communication from the transmitter to the receiver and a set of valid acknowledgement states for transmission from the receiver to the transmitter. A Hamming distance between patterns of zeroes, and between patterns of ones, in valid states of each of these sets is at least one and the transmitter is arranged to transition between a number of transmission states in response to the reception of an acknowledgement state from the receiver which matches a transmission state it has sent to the receiver on a request bus. A communication protocol which is robust across a multi-voltage and/or clock domain interface is thus provided.

Transmitter, a receiver, a data transfer system and a method of data transfer

A system comprises a first domainand second domainwhich communicate via an interface. The first domaintransmits power state commands to the second domainfor controlling transitions of power states at the second domain. The power state commands include at least a power up commandfor triggering a transition to a power up state and a power no-operation commandin response to which the second domain remains in the current one of the power states. The no-operation commandenables the second domainto be left in either the power up state or a different power state even if the first domainis powered down.

No-operation power state command

Mechanisms are provided for energy management signalling with an apparatus for processing data, such as a system-on-chip integrated circuit (). Processing circuitry () is coupled to consumer energy interface circuitry () which communicates with energy management circuitry (). The energy management signals which are communicated include a static power consumption signal indicative of a level of power consumption which is independent of processing operations being performed and a dynamic power consumption signal indicative of a level of dynamic power consumption which is dependent upon the processing operations being performed.

Power signal interface

Storage bitcell with isolation

An integrated circuit including a first voltage domain incorporates real time clock circuitry that communicates via communication circuitry with processing circuitry contained within a second voltage domain. The communication circuitry includes first parallel-to-serial conversion circuitry located within the first voltage domain, level shifting circuitry for passing serial signals between the voltage domains and second parallel-to-serial circuitry located in the second voltage domain.

Communication between voltage domains

An electronic devicehas circuitrywhich operates in a first voltage domainsupplied with a first voltage level VDDand a reference voltage level. A voltage regulatorgenerates the first voltage level VDDfrom a second voltage level VDDhigher than the first voltage level VDD. At least one power gateis provided for selectively coupling the circuitryto one of the first voltage level VDDor the reference level. The control signalfor the power gateis generated in a second voltage domain supplied with a higher voltage level VDDor VDDderived from the second voltage level VDDsupplied to the voltage regulator. Hence, an existing high voltage source within the devicecan be reused for applying a boosted voltage to power gates to improve efficiency of power gating.

Power gating in an electronic device

An integrated circuit has voltage generating circuitry for generating an on-chip voltage from a supply voltage in response to clock pulses. Clock control circuitry controls transmission of the clock pulses to the voltage generating circuitry. The clock control circuitry receives a reference voltage and a digital offset value comprising a binary numeric value identifying an offset. The clock control circuitry suppresses transmission of the clock pulses if the on-chip voltage is greater than the sum of the reference voltage and the offset identified by the digital offset value, to reduce power consumption. The offset can be tuned digitally to vary the average level of the on-chip voltage. A similar digital tuning mechanism may be used in a clocked comparator to compare a first voltage with a digitally tunable threshold voltage.

Controlling voltage generation and voltage comparison

A power control integrated circuit is provided having a voltage switching device and a retention switching device that has an input from an overdrive voltage supply such that in a retention enabled configuration a retention switching device is switched on more strongly relative to being both coupled to and driven from the voltage supply input signal associated with the voltage switching device. An overdriven retention switching device is provided as a separate entity from the voltage switching device itself and a computer readable storage medium is provided storing a data structure comprising a standard cell circuit definition for use in generating validating the circuit layout of a circuit cell of an integrated circuit. The circuit cell comprising an overdriven retention switching device. A further data structure corresponding to a standard cell is provided comprising an overdriven retention switching device and a voltage switching device and yet a further standard cell data structure is provided comprising an overdriven voltage switching device.

Power controlling integrated circuit and retention switching circuit

A monitoring circuit for an integrated circuit comprises a non-temperature-inverted circuit and a temperature-inverted circuit. Operating parameters of the two circuits are measured, representing the propagation speed of signals in the respective circuits. In response to a change in temperature, the non-temperature-inverted circuit slows down and the temperature-inverted circuit speeds up. In contrast, in response to a change in operating voltage both circuits either speed up or slow down. This divergence in response to temperature and similar response to voltage enables the monitoring circuit to distinguish between changes in operating voltage and changes in operating temperature.

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Cambridge, United Kingdom

David Walter Flynn