West Virginia University

Other

Aspinity, Inc.

David W Graham

Brandon David Rumberg

Vinod Kulathumani

Brandon Michael Kelly

According to some embodiments, an analog processing portion may receive an audio signal from a microphone. The analog processing portion may then convert the audio signal into sub-band signals and estimate an energy statistic value, such as a Signal-to-Noise Ratio ('SNR') value, for each sub-band signal. A classification element may classify the estimated energy statistic values with analog processing such that a wakeup signal is generated when voice activity is detected. The wakeup signal may be associated with, for example, a battery-powered, always-listening audio application.

Analog voice activity detection

According to some embodiments, a sensor network may be provided with re-programmable and/or reconfigurable analog circuitry configured to monitor data collected by the sensor network. The re-programmable and/or reconfigurable analog circuitry may also generate a wakeup signal in response to a defined wakeup event detected by the sensor network.

Selective wakeup of digital sensing and processing systems using reconfigurable analog circuits

Aspects of a low power memory buffer are described. In one embodiment, a sampling rate of a signal is adjusted to identify extrema of a signal. An extrema pulse is generated and, in response to the extrema pulse, a time segment and potential value of the signal are stored in a memory. In other aspects, rising and falling slopes of the signal are tracked to identify a local maximum and a local minimum of the signal. In this scenario, an extrema pulse is generated for each of the local maximum and minimum, and time segment and potential values are stored for the local maximum and minimum. Generally, the storage of analog values of the signal at an adjusted sampling rate is achieved with low power, and the signal may be reconstructed at a later time.

Compressed sampling and memory

Aspects of a continuous-time memory cell circuit are described. In various embodiments, the memory cell circuit may comprise a memory cell, a current source coupled to the memory cell, and circuitry for programming the memory cell at an adaptive rate, based on a target voltage for programming, using a feedback loop between a gate terminal of the memory cell and a reference control input. Based on the circuitry for programming, the memory cell may be programmed according to various voltage and/or current references, by linear injection and/or tunneling mechanisms. According to various aspects, the circuitry for programming drives a memory cell to converge to a voltage target for programming within a short period of time and to a suitable level of accuracy.

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Morgantown, WV, United States of America

David W Graham