Acacia Communications, Inc.

Socionext Inc.

David Timothy Enright

Ian Juso Dedic

Tarun Gupta

Gavin Allen

Guojun Ren

Darren Walker

Bo Yang

In an embodiment, an apparatus and system comprising a first inductor with a first diameter; and a switched inductor including a metal layer and a switch; wherein when the switch is closed the switch connects the metal layer of the switched inductor to form an inductor with a parallel circuit enabling current to flow through the switched conductor; and wherein when the switch is open, current is not enabled to flow through the switched conductor. In another embodiment, a method for tuning a high-Q inductor, the method comprising closing a switch of a switched inductor, wherein the switch connects the switched inductor to a first inductor; wherein closing the switch enables current to flow though the switched inductor as well as the first inductor to change the inductance of the high Q inductor.

High-Q switch inductor

An apparatus comprising two inductors; wherein the two inductors are layered on top of each other in different layers of metal of a circuit; wherein each inductor of the inductor has a set of turns; wherein the current path of the two inductors is in the same direction.

Clock buffer inductor

In a first and second embodiment, an apparatus and system comprising a set of voltage controlled oscillators (VCOs); wherein each VCO of the set of VCOs has an LC tank; wherein each VCO of the set of VCOs is connected via a transmission line. In a third embodiment, a method comprising connecting each VCO in a set of VCOs by connecting each respective LC tank of each VCO of the set of VCOs with a transmission line.

Distributed voltage controlled oscillator (VCO)

An apparatus and system for a clock buffer. The clock buffer comprises a source follower, and the source follower comprises a voltage source and a resistor.

High-Q clock buffer

There is disclosed herein clock generation circuitry, in particular rotary travelling wave oscillator circuitry. Such circuitry comprises a pair of signal lines connected together to form a closed loop and arranged such that they define at least one transition section where both said lines in a first portion of the pair cross from one lateral side of both said lines in a second portion of the pair to the other lateral side of both said lines in the second portion of the pair.

Clock generation circuitry

An integrated circuit comprising an inductor arrangement, the arrangement comprising: four inductors adjacently located in a group and arranged to define two rows and two columns, wherein: the integrated circuit is configured to cause two of those inductors diagonally opposite from one another in the arrangement to produce an electromagnetic field having a first phase, and to cause the other two of those inductors to produce an electromagnetic field having a second phase, the first and second phases being substantially in antiphase.

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Maldon, United Kingdom

David Timothy Enright