Analog Devices,inc.

David Thomson

Jonathan Mark Audy

Evaldo M Miranda

A Paul Brokaw

Michael P Daly

John Blake

Trey Roessig

John Anthony Cleary

Evaldo M Miranda, Jr

Patrick J Meehan

Andrew T K Tang

Ranajit Ghoman

Lorcan Mac Manus

Paul Sheridan

Alan Li

A system for time-sequential LED-string excitation includes a controller coupled to at least two LED strings and arranged to sequentially excite the strings&#x2014;preferably by pulse-width modulating their respective currents&#x2014;such that each string conducts a desired current and/or provides a desired light intensity. Individual string currents and/or light intensities are provided to the controller as feedback signals. The controller preferably pulse-width modulates each string such that it conducts a current which approximates the performance that would be provided if the string were made to continuously conduct an 'optimal' current. A voltage converter may be included to provide the supply voltage connected to the top of each LED string, and to adjust the supply voltage as needed to ensure that each string conducts a desired current.

System for time-sequential LED-string excitation

A serial digital communication system includes a master device and a plurality of slave devices connected serially between the master device's output and input&#x2014;thereby forming a closed chain. Each slave device transmits a predetermined number of PWM pulses to the device following it in the chain upon receipt of an end-of-transmission (EOT) signal from the device preceding it in the chain, and transmits an EOT signal when the transmission of its PWM pulses is completed. The master device transmits an EOT signal to initiate the transmission of PWM pulses from each slave device. Each slave device passively buffers PWM pulses received from the preceding device, such that PWM pulses are transmitted in one direction sequentially to the input of the master device via the intervening slave device.

Serial digital communication system and method

A voltage source includes first and second pn junctions which conduct the outputs of respective current sources to establish respective base-emitter voltages Vand Vat respective nodes; Vand Vcan each be generated with a current I or a current N*I. An amplifier Ahas its non-inverting input connected to the second node and its inverting input connected to the first node through an input capacitor; a feedback capacitor is connected between the inverting input and a third node. Switches are connected between A's inverting input and A's output, between the third node and A's output, and between the third node and a circuit common point. A control circuit operates the switches and current sources during first and second operating phases to selectively produce a temperature independent output voltage or a temperature dependent output voltage.

Voltage source circuit with selectable temperature independent and temperature dependent voltage outputs

A programmable fuse state determination system and method provide a fuse current through a programmed fuse which produces a voltage that varies with the fuse's resistance. The voltage is compared with a threshold voltage to indicate whether the fuse is blown or intact. The invention employs 'normal' and 'test' modes, in which the relationship between the fuse's resistance and the threshold voltage differ, such that a higher fuse resistance is required for the fuse to be determined blown in the &#x2018;test&#x2019; mode than in the &#x2018;normal&#x2019; mode.

Programmable fuse state determination system and method

A four current transistor temperature sensor comprises a p-n junction, preferably the base-emitter junction of a bipolar transistor, which is driven with four different currents in a predetermined sequence. Each of the four currents induces a respective base-emitter voltage, which is measured. The temperature of the transistor is calculated based on the values of the four driving currents and the four measured base-emitter voltages. The four driving currents (I , I , I and I ) are preferably arranged such that I *I , I *I , I /I &equals;A and I /I &equals;A, where A is a predetermined current ratio. I and I produce respective base-emitter voltages which are subtracted from each other to produce &Dgr;V , and I and I produce respective base-emitter voltages which are subtracted from each other to produce &Dgr;V . When so arranged, the difference between &Dgr;V and &Dgr;V is entirely due to the effect of series base and emitter resistances r and r . Therefore, the &Dgr;V &minus;&Dgr;V value provides a correction factor which enables temperature measurement errors due to r and r to be eliminated.

Four current transistor temperature sensor and method

A dynamically boosted current source circuit improves the response speed of a circuit responsive to a transitioning input signal. The circuit's responsiveness varies with the magnitude of the current provided to an identified node, and a current source capable of providing nominal and boosted currents is connected to the node. A threshold detector detects the occurrence of an input signal transition prior to its detection by the responsive circuit, and triggers the current source to provide the boosted current; this improves the responsive circuit's speed by charging or discharging identified node capacitances which hinder its operation. The identified node can be an input node, an output node, or an internal node. The current source provides the boosted current for a predetermined time interval, or until the input signal crosses a second threshold, enabling response speed to be increased without a significant increase in supply current.

Dynamically boosted current source circuit

An IC monitoring chip (,) for remotely monitoring the output of a thermal diode (,) formed in the substrate of a CPU (,) for monitoring the temperature of a thermal plate (,) of the CPU (,) comprises a signal conditioning circuit (,) which relays the output from the diode (,) to an analog-to-digital converter (,), which in turns outputs a two's compliment signal to an adder (,). The adder (,) adds the two's compliment signal to a temperature offset value stored in a temperature offset register (,), which compensates for the temperature difference between the diode (,) and the thermal plate (,). Comparators (,) and (,) compare the output from the adder (,) with upper and lower predetermined temperature limits in upper and lower limit registers (,) and (,) for determining the temperature of the thermal plate (,). The temperature offset value is stored in ROM (,) of the computer (,) and is written to the register (,) each time the computer (,) is powered up. The IC chip (,) operates independently of the CPU (,).

IC monitoring chip and a method for monitoring temperature of a component in a computer

A tri-state input detection circuit produces two binary outputs that indicate whether a tri-state input signal is high, low, or in a hi-impedance state. A pair of transistors conduct a current in response to a tri-state signal presented at an input node. Circuitry is provided to pull the input node to a known voltage when the input signal is in its hi-Z state. The transistors are series-connected to respective current sources, with the junctions between the transistors and their current sources forming the circuit's binary outputs. The output impedances of the current sources are made less than those of their respective transistors, so that when turned on by the input signal, a transistor pulls its associated output high or low. The circuit produces a unique binary output for each of the three input signal states. In a preferred embodiment, sampling pulses briefly activate the circuit, and downstream circuitry latches the circuit's outputs, reducing current consumption to zero except during the sampling period.

Tri-state input detection circuit

A comparison system compares a voltage which is proportional to absolute temperature S.sub.p to one which is equal to the sum of a conventional, uncorrected, bandgap cell voltage VBG and a proportional to absolute temperature voltage CT. The addition of CT to the uncorrected bandgap signal value yields a signal of the form Sp/(VBG+CT), which exhibits improved linearity over a signal of the form Sp/VBG, where VBG includes a Tln(T) term.

Ratio correction circuit and method for comparison of proportional to

A voltage divider and inverter provide a power-on-reset signal. The divider is placed between high and low power voltages, the divided voltage is the input to the inverter and the output of the inverter is the power-on-reset signal. The divider and inverter may be implemented on a single integrated circuit and accompany other, control and operational, circuitry on the integrated circuit. The divider is chosen so that the input to the inverter reaches the inverter's threshold voltage when the power voltage reaches a predetermined value.

Voltage-controlled reset for logic state initialization

A watchdog circuit accepts an output signal from a monitored circuit such as a microprocessor to determine whether the monitored circuit is operating appropriately or has incurred an error. The monitored circuit must periodically assert the output signal to prevent the watchdog circuit, which imposes both upper and lower frequency bounds on the assertion of this signal, from 'timing out' and setting a watchdog error alarm. The watchdog circuit may be combined with other circuits, such as power on reset, battery back-up switching, etc., within a microprocessor supervisory circuit.

Watchdog circuit employing minimum and maximum interval detectors

An analog-to-digital converter employs a sigma-delta modulator that produces a pulsed output with an average duty cycle that varies with an analog input to the modulator. A counter averages the modulator's output duty cycle, and feeds the averaged information onto a one-line transmission circuit for delivery to a remote location. Both the sigma-delta modulator and the counter are synchronized to the same local clock, so that the counter's duty cycle remains substantially constant even if the clock frequency varies. This allows for a simple clock configuration that can be integrated along with the sigma-delta modulator and counter on a single IC chip of reasonable size. When used for temperature sensing, the counter's output duty cycle provides an indication of the locally sensed temperature, independent of temperature-induced variations in the clock frequency.

Analog-to-digital converter with sigma-delta duty cycle encoded output

A voltage attenuation network includes one or more cascaded resistor ladder stages, with decremented voltage taps provided at successive cascaded steps within each stage. Each stage includes a termination step having a resistance value Ri equal to the stage input impedance, series step resistors with resistance values Ri(1-A)/A and shunt step resistors with resistance values Ri/(1-A), where A is a step-to-step voltage attenuation factor. The input resistances of each step within a given stage are substantially equal, eliminating the need for output buffers at the step taps. A pair of switches are provided for each step, including an output switch connected between the step input node and a common output line, and a shunt switch connected in series with the shunt resistor for that step. Only one output switch is closed at a time, and only the corresponding shunt switch for the same step is opened. Multiple stages can be cascaded to provide a progressively finer voltage decremention, with the input impedance for each stage equal to the shunt resistance values for the preceding stage.

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Fremont, CA, United States of America

David Thomson