Google Inc.

Inphi Corporation

Amazon Technologies, Inc.

Rambus Inc.

Metaram, Inc.

International Business Machines Corporation

Epicenter, Incorporated

Chatsworth Products, Inc.

Cephea Valve Technologies, Inc.

David T Wang

Suresh Rajan

Michael John Sebastian Smith

Keith R Schakel

Frederick Daniel Weber

James Robert Lim

Christopher Haywood

Edward Behrens

Tho Tu

Yuting Yeh

Nirmal Raj Saxena

Daniel L Rosenband

Michael J S Smith

Andrew J Burstein

Michael J Smith

Van T Hua

Lawrence Tse

Philip Arnold Ferolito

Nikhil Rao

Anshul Mohan Gupta

Ian Baker

Jay Akkad

Bryan Holmdahl

Haoxing Zhang

Erik Avy Vaknine

Hamid Reza Rategh

Ulas Kirazci

Joshua Richard Williams

Vidhyananth Ramasamy Venkatasamy

Tyler Moore

Kelly Veit

Thomas Gang Wang

Poon-Keong Ang

Dietrich Shing-Quan Ho

Wellington C Yu

Joseph Jaoudi

Terry Simons

Michael Kwiatkowski

Geo Hsu

David Liem

Joseph Charles Fjelstad

Wael Zohni

John W Goodin

Xin Li

John S Wang

Ihab A Ali

James T Brady

Arvind M Patel

Norman Ken Ouchi

Chao Xu

Spencer C Noe

William P Schmidt

Stephen Gouze Luning

Ramez Nachman

Chan Y Ng

Arun Prakash Raghupathy

Sreenivas Krishnan

Aaron Grogan

Jeremy Werner

Jonathan Oakden

Matthew E Wong

Evelyn N Haynes

Neil Dhillon

Lauren Francine Chanen

Kok Yen Cheng

David Tuzman

Yuanyuan Song

Jeremy Plunkett

Puneet Gupta

Chien-Hsin Lee

Chang Hong Ye

John R Disbrow

Everett T Eiselen

Gerald I Findley

Eric Deshan McDonald

James (Jimmy) Robert Lim

Yuting (Tim) Yeh

Lawrence Y Ho

Robert Matthes

Bonnie Yip

Pak Heng Lau

Chester R Stevens

John D Yeager

Jonathan Fought

Larry Kan

Srinivas Bamdhamravuri

Michael John Sebastien Smith

Suresh Natarajan Rajan

A method for operating a DRAM device. The method includes receiving in a memory buffer in a first memory module hosted by a computing system, a request for data stored in RAM of the first memory module from a host controller of the computing system. The method includes receiving with the memory buffer, the data associated with a RAM, in response to the request and formatting with the memory buffer, the data into a scrambled data in response to a pseudo-random process. The method includes initiating with the memory buffer, transfer of the scrambled data into an interface device.

Memory buffer with data scrambling and error correction

Disclosed herein are systems having an integrated circuit device disposed within an integrated circuit package having a periphery, and within this periphery a transaction processor is configured to receive a combination of signals (e.g., using a standard memory interface), and intercept some of the signals to initiate a data transformation, and forward the other signals to one or more memory controllers within the periphery to execute standard memory access operations (e.g., with a set of DRAM devices). The DRAM devices may or may not be in within the package periphery. In some embodiments, the transaction processor can include a data plane and control plane to decode and route the combination of signals. In other embodiments, off-load engines and processor cores within the periphery can support execution and acceleration of the data transformations.

Near-memory compute module

A system for heart valve repair includes a packaging assembly for storing the replacement heart valve. The packaging assembly includes a valve support having a base for holding the replacement heart valve, a ring positioned within the valve support and configured to fit around a circumference of the replacement heart valve, and a retention mechanism. The retention mechanism includes a cap and plurality of sutures configured to be attached to the cap and to the replacement heart. The packaging assembly having a locked configuration in which the ring and the valve support are locked together and the sutures tension the replacement heart valve. The packaging assembly is designed to hold and transport a replacement heart valve and fits within a shipment jar.

Prosthetic heart valve packaging and attachment assembly

This application is directed to protecting a battery or battery by a battery protection system including two distinct protection integrated circuits (PICs). The two PICs are configured to determine whether a drive current of the battery is at fault and generate distinct switching signals indicating whether the drive current of the battery is at fault. The two PICs are interchangeable with each other. The battery protection system further includes control logic and two switching components. The control logic is configured to combine the switching signals provided by the two PICs to provide a combined switching signal. Each switching component is coupled to the control logic and configured to control a current path of charging and discharging the battery based on the combined switching signal.

Dual battery protection of rechargeable batteries

A battery pack includes a battery, a first temperature sensor configured to provide a first temperature value associated with a temperature of the battery, a heat source disposed proximate to the battery and configured to heat the battery, a second temperature sensor configured to provide a second temperature value associated with a temperature of the heat source, and a control board coupled to the first temperature sensor and the second temperature sensor, wherein the control board is configured to receive the first temperature value and the second temperature value. The control board is configured to compare the first temperature value and the second temperature value to determine a temperature gradient between the battery and the heat source and transmit an alert if the temperature gradient exceeds a first temperature gradient threshold.

Thermal gradient battery monitoring system and methods

A method for monitoring battery degradation including receiving, from a pressure sensor, a first pressure value associated with a battery pack, comparing the first pressure reading to a first pressure threshold value and if the first pressure reading is greater than the first pressure threshold value, applying a first battery discharge pulse to the battery pack. The method further includes calculating a first internal resistance value of the battery pack in response to the first battery discharge pulse, comparing the first internal resistance value to an initial internal resistance value, and transmitting an alert to an electronic device if the first internal resistance value exceeds the initial internal resistance value.

Battery degradation monitoring system and methods

This application is directed to a battery protection system including a sense resistor, a comparator, a switching component, and a protection integrated circuit (PIC). The sense resistor is electrically coupled in series with one of a plurality of rechargeable battery cells that are coupled in parallel in a battery. The comparator is coupled to the sense resistor and configured to compare a voltage drop across the sense resistor with a reference voltage to determine whether a subset of the rechargeable battery cells is not charging in the battery. The switching component is coupled to the battery, while the PIC is coupled to the comparator and the switching component. The PIC is configured to control charging and discharging of the battery including disabling the battery from being charged in accordance with a determination that a subset of the rechargeable battery cells is not charging in the battery.

Protection of parallel battery cells in a battery

This application is directed to an electronic device powered by one or more rechargeable battery cells. The electronic device includes a first negative temperature coefficient (NTC) thermistor proximate to the battery cells, and an open capacitor coupled in parallel with the NTC thermistor. The open capacitor has an open area and two electrodes that are at least partially exposed via the open area and electrically isolated. The electronic device further includes a control circuit coupled to the NTC thermistor and the open capacitor. The control circuit is configured to detect a voltage drop across the NTC thermistor and the open capacitor if conductive liquid enters the open area of the capacitor and electrically connects the two electrodes that are at least partially exposed via the open area.

Battery protection systems for detecting conductive liquid ingress and associated devices and methods

Secure communication in mobile digital pages is provided. The system receives an electronic document and validates the electronic document for storage in a cache server. The system receives a request for the electronic document and provides it to a viewer component on a client computing device. The viewer component loads the electronic document in an iframe. The viewer component executes a runtime component to receive, via a secure communication channel, a tag from the electronic document. The system receives the tag and selects a data value for transmission to the viewer component. The viewer components provides the data value to cause the runtime component to execute an action with the data value.

Secure communication in mobile digital pages

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for facilitating input by a user into a form. In one aspect, a method include actions of obtaining a web resource that includes a form, determining a particular field of the form has been selected, determining an intent that corresponds to the form from a first semantic tag in the web resource, determining a parameter of the intent that corresponds to the particular field of the form from a second semantic tag in the web resource, determining a value to suggest for the particular field based at least on the intent and the parameter of the intent, and providing the value for output as a suggestion of input for the particular field.

Input facilitation for forms in web resources

In an example, the present invention provides a memory interface device. The device has a command interface, address interface, and a control interface device coupled, respectively, to a command address bus, an address bus, and a control interface bus of a host memory controller. The device has a status signal interface configured to output a status signal coupled to the data interface bus of the host memory controller. In an example, the status signal is asserted in an absence of data asserted on the data interface bus.

Buffering device with status communication method for memory controller

Growing community of inventors

San Jose, CA, United States of America

David T Wang