Hewlett-packard Company

David Steven Maitland

Freddie W Wenninger

John C Keith

Douglas M Clifford

Donald E Morris

Louis T Schulte

Jindrich Kohoutek

Peter Jacob Meier

Gordon W Motley

Billy E Thayer

Havyn Eugene Bradley

William D Eads

Sandy Lee Chumbley

A high voltage tolerant CMOS output driver circuit and high voltage tolerant CMOS input receiver circuit, through the use of shield transistors and the redefinition of the substrate of the PFET devices, is provided. The invention may be incorporated for protection in integrated circuits operating with a lower power supply voltage than externally interfaced devices operating with a higher power supply voltage.

High voltage tolerant CMOS input/output pad circuits

The output impedance in a CMOS output driver stage is programmed and compensated by complementary current mirrors that are MOS devices in series with each of the conventional pull-up and pull-down devices. The conduction of these additional complementary devices is controlled according to complementary programming signals that are compensated for variations in manufacturing process parameters as well as for changes in temperature. A P-type programming signal may be referenced to +VDD and be produced from an N-type programming signal referenced to GND by the action of a gate voltage mirror that includes symmetrical N-type and P-type FET's in series. The N-type programming signal may be produced in the first instance from the gate voltage of an N-type FET used in a feedback loop that servos an external programming voltage to track an internally generated reference voltage. That gate voltage exhibits variations that reflect differences attributable to both process variations and to temperature. Those exhibited variations are communicated by a current mirror to a gate voltage mirror that produces the complementary programming signals, and which themselves constitute negative feedback. The complementary current mirrors are of known of gain, which in conjunction with knowing the value of VDD, allows the determination in advance of a definite table of programming resistance values versus output impedances.

Method of programming a desired source resistance for a driver stage

An adaptable calculator is provided by employing five MOS/LSI circuits interconnected by a multiple line bus system. They include (1) a read-only memory circuit group; (2) a control and timing circuit; (3) an arithmetic and register circuit; (4) a data storage circuit; and (5) an input/output (I/O) circuit. Input and output units include a keyboard input unit and an 18-column output printer unit for printing intermediate results of calculations, entered data, arithmetic operators, and diagnostic notes. The keyboard input unit includes a PERCENT key that may be employed in combination with any of four arithmetic operator keys. The calculator may be operated manually by the user from the keyboard input unit or automatically by a program written in user-level language and stored in a plug-in read-only memory unit (ROM), a plug-in programmable read-only memory unit (PROM) or a read/write memory unit associated with a plug-in magnetic card reading and recording unit.

Adaptable programmed calculator including a percent keyboard operator

An adaptable calculator is provided by employing five MOS/LSI circuits interconnected by a multiple line bus system. They include (1) a read-only memory circuit group; (2) a control and timing circuit; (3) an arithmetic and register circuit; (4) a data storage circuit; and (5) an input/output (I/O) circuit. Input and output units include a keyboard input unit and an 18-column output printer unit. An optional LED display unit may be plugged into the calculator mainframe. The keyboard input unit includes an AUTO DECIMAL POINT key for selecting an automatic decimal point mode of calculator operation in which the calculator automatically places the decimal point at a specified location in all entered data. Thus, the operator need not manually enter the decimal point in entered data. The calculator may be operated manually by the user from the keyboard input unit or automatically by a program stored in the calculator memory.

Adaptable programmed calculator including automatic decimal point

Half-adder logic modules employing separate summing and carry circuitry are used in the construction of a modular binary half-adder. Carry bits of less significant digits are calculated independent of and prior to the calculation of corresponding sum bits, thus allowing rapid propagation of such carry bits to more significant digits and subsequent parallel summation of the sum bits using the carry bits previously calculated.

Modular binary half-adder

A binary adder employs separate summing and carry circuitry within each digit to optimize the speed of operation of the adder. Carry bits of less significant digits are calculated independently of corresponding sum bits, thus allowing propagation of such carry bits to more significant digits before completion of the summation of the less significant digits.

Binary adder

A circuit is described which compensates for variation in the threshold voltage of Insulated Gate Field Effect Transistors (IGFETs) in an integrated circuit by modulating the substrate voltage in response to the variation of the threshold voltage from a desired nominal value.

IGFET threshold voltage compensator

An information transfer bus circuit useful in metal oxide semiconductor integrated circuits employs a network to compensate for signal losses arising from capacitance associated with gating devices in the circuit.

Information transfer bus circuit with signal loss compensation

An adaptable calculator is provided by employing five MOS/LSI circuits interconnected by a multiple line bus system. They include (1) a read-only memory circuit group in which subroutines for performing arithmetic and other functions of a basic keyboard input unit are stored; (2) a control and timing circuit for scanning the keyboard, for retaining status information relating to the condition of the calculator or of a particular subroutine, and for generating a next address in read-only memory; (3) an arithmetic and register circuit containing an adder, a group of working registers, a group of data storage registers forming a stack, and a constant storage register; (4) a data storage circuit which provides ten data storage registers, nine of which are employed by the calculator system and one of which is available to the user for storing data; and (5) an input/output (I/O) circuit for enabling the calculator to communicate with various I/O peripheral units such as a typewriter and an X-Y plotter, for performing binary arithmetic by means of a binary arithmetic logic unit contained therein, and for performing various system housekeeping operations. Input and output units include a keyboard input unit having a receptacle for accommodating a 15-key function block to enlarge the capabilities of the calculator and an 18-column output printer unit for printing intermediate results of calculations, entered data, arithmetic operators, and diagnostic notes. An optional 15-digit seven-segment light emitting diode (LED) output display unit may be inserted into the calculator mainframe. All of these input and output units are included within the calculator itself. An X-Y plotter, a typewriter, a marked sense card reader, an extended data storage memory, a magnetic card reading and recording unit, a ASCII bus for enabling the calculator to communicate with data gathering instruments, and many other peripheral input and output units may also be employed with the calculator. The calculator may be operated manually by the user from the keyboard input unit or automatically by a program written in user-level language and stored in a plug-in read-only memory unit (ROM), a plug-in programmable read-only memory unit (PROM) or a read/write memory unit associated with a plug-in magnetic card reading and recording unit.

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Loveland, CO, United States of America

David Steven Maitland