Soitec

David Sotta

Oleg Kononchuk

Jean-Marc Bethoux

Benjamin Damilano

Olivier Ledoux

Morgane Logiou

Mariia Rozhavskaia

Olivier Bonnin

Raphaël Caulmilone

An optoelectronic semiconductor structure comprises an InGaN-based active layer disposed between an n-type injection layer and a p-type injection layer, the p-type injection layer comprising a first InGaN layer having a thickness between 50 and 350 nm and, disposed on the first layer, a second layer having a GaN surface portion.

Optoelectronic semiconductor structure comprising a p-type injection layer based on InGaN

A process for collectively fabricating a plurality of semiconductor structures comprises providing a substrate including a carrier having a main face, a dielectric layer on the main face of the carrier and a plurality of crystalline semiconductor growth islands on the dielectric layer. At least one crystalline semiconductor active layer is formed on the growth islands. After the step of forming the active layer, trenches are formed in the active layer and in the growth islands in order to define the plurality of semiconductor structures.

Process for collectively fabricating a plurality of semiconductor structures

A method for preparing a crystalline semiconductor layer in order for the layer to be provided with a specific lattice parameter involves a relaxation procedure that is applied for a first time to a first start donor substrate in order to obtain a second donor substrate. Using the second donor substrate as the start donor substrate, the relaxation procedure is repeated for a number of times that is sufficient for the lattice parameter of the relaxed layer to be provided with the specific lattice parameter. A set of substrates may be obtained by the method.

Supports for a semiconductor structure and associated wafers for an optoelectronic device

A structure that can be used to manufacture at least one active layer made of a III-V material thereon includes a substrate comprising a carrier having a main face, a dielectric layer located on the main face of the carrier, and a plurality of single-crystal semiconductor islands located directly on the dielectric layer. The islands have an upper surface in order to serve as a seed surface for the growth of the active layer. The structure further comprises a seed layer located between the single-crystal semiconductor islands, directly on the portion of the dielectric layer that is not covered by the islands, without masking the upper surface of the islands, so that the dielectric layer is not exposed to the external environment.

Structure comprising single-crystal semiconductor islands and process for making such a structure

Method for manufacturing a donor substrate for making optoelectronic devices

A method for manufacturing a plurality of crystalline semiconductor islands having a variety of lattice parameters comprises providing a substrate including a medium, a flow layer disposed on the medium, and a plurality of strained crystalline semiconductor islands having an initial lattice parameter arranged on the flow layer. The strained semiconductor islands are selectively treated so as to form a first group of strained islands having a first lateral expansion potential, and a second group of strained islands having a second lateral expansion potential that is different from the first lateral expansion potential. The substrate is heat treated at a temperature at or above a glass transition temperature of the flow layer to cause differentiated relaxation of the islands of the first and second groups, such that a lattice parameter of the first group of relaxed islands differs from a lattice parameter of the second group of relaxed islands.

Growth substrate for forming optoelectronic devices, method for manufacturing such a substrate, and use of the susbstrate, in particular in the field of micro-display screens

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Grenoble, France

David Sotta