Skyworks Solutions, Inc.

David Scott Whitefield

Dylan Charles Bartle

Paul T DiCarlo

Jerod F Mason

Nuttapong Srirattana

Hanching Fuh

Hailing Wang

David Ryan Story

David T Petzold

Florinel G Balteanu

Guillaume Alexandre Blin

Yu Zhu

Ambarish Roy

Steven Christopher Sprinkle

Boshi Jin

Dogan Gunes

Anthony James Lobianco

Howard E Chen

Aniruddha B Joshi

Zhiyang Liu

Tzung-Yin Lee

Darryl Earl Evans

Maureen Rosenberg Brongo

Jing-Hwa Chen

Kevin F Walsh

Rei Goto

William John Domino

Sriram Srinivasan

Kenneth Norman Warren

Christopher Robert Little

The fabrication of field-effect transistor (FET) devices is described herein where the FET devices include one or more body contacts implemented between source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. The FET devices can include source fingers and drain fingers interleaved with gate fingers. The source and drain fingers of a first S/G/D assembly can be electrically connected to the source and drain fingers of a second S/G/D assembly. The source fingers and the drain fingers can be arranged in alternating rows.

Field-effect transistors with interleaved finger configuration

Disclosed herein are switching or other active FET configurations that implement a branch design with one or more interior FETs of a main path coupled in parallel with one or more auxiliary FETs of an auxiliary path. Such designs include a circuit assembly for performing a switching function that includes a branch with a plurality of auxiliary FETs coupled in series and a main FET coupled in parallel with an interior FET of the plurality of auxiliary FETs. The body nodes of the FETs can be interconnected and/or connected to a body bias network. The body nodes of the FETs can be connected to body bias networks to enable individual body bias voltages to be used for individual or groups of FETs.

Main-auxiliary field-effect transistor configurations

Apparatus and methods for distributing millimeter wave cellular service over a face of a building are disclosed. In certain embodiments, an antenna assembly includes an antenna upper unit configured to extend from a top of a building, such as from a roof. The antenna upper unit includes a first linear antenna array that radiates a transmit beam having a disc-shaped pattern. The antenna assembly includes an antenna lower unit configured to extend from the building beneath the antenna upper unit. The antenna lower unit includes a second linear antenna array that receives the transmit beam.

Antenna arrangement for distributing millimeter wave cellular service over a face of a building

Antenna arrays with multiple feeds and varying pitch are disclosed. In certain embodiments, a radio frequency (RF) module includes a module substrate, a semiconductor die attached to the module substrate, and an antenna array attached to the module substrate. The semiconductor die includes a plurality of power amplifiers configured to amplify a corresponding plurality of RF signals to generate a plurality of amplified RF signals. The antenna array is configured to receive the plurality of amplified RF signals from the plurality of power amplifiers, and includes a plurality of antenna elements arranged with a varying pitch. Each of the plurality of antenna elements includes two or more signal feeds.

Antenna arrays with multiple feeds and varying pitch for wideband frequency coverage

Fabricating field-effect transistors with interleaved source and drain finger configuration

Switches with main-auxiliary field-effect transistor configurations

Main-auxiliary field-effect transistor configurations with an auxiliary stack and interior parallel transistors

The fabrication of field-effect transistor (FET) devices is described herein where the FET devices include one or more body contacts implemented between source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. The FET devices can include source fingers and drain fingers interleaved with gate fingers. The source and drain fingers of a first S/G/D assembly can be electrically connected to the source and drain fingers of a second S/G/D assembly.

Fabricating field-effect transistors with body contacts between source, gate and drain assemblies

A semiconductor device includes a transistor implemented over an oxide layer, one or more electrical connections to the transistor, one or more dielectric layers formed over at least a portion of the electrical connections, an electrical element disposed over the one or more dielectric layers, the electrical element being in electrical communication with the transistor via the one or more electrical connections, a patterned form of sacrificial material covering at least a portion of the electrical element, and an interface layer covering at least a portion of the one or more dielectric layers and the sacrificial material.

Isolation cavities in semiconductor devices

A method for fabricating a semiconductor device involves providing a transistor device formed over an oxide layer formed on a semiconductor substrate, removing at least part of the semiconductor substrate, applying an interface material below to at least a portion of the oxide layer, removing a portion of the interface material to form a trench, and at least partially covering the interface material and the trench with a substrate layer to form a cavity.

Radio-frequency isolation using backside cavities

Radio-frequency core circuitry includes a first switch arm associated with a first signal band and coupled to a common node, a second switch arm associated with a second signal band and coupled to the common node, a first shunt arm connected to a first shunt node in the first switch arm, and a first transmission line disposed in the first switch arm between the common node and the shunt node and having a length configured present an open circuit at a fundamental frequency associated with the second signal band and to present a short circuit at a harmonic of the fundamental frequency associated with the second signal band.

Transmission-line-based radio-frequency switching

A transistor device includes a plurality of drain fingers that are elongate in a first dimension, a plurality of source fingers that are elongate in the first dimension and interleaved with the plurality of drain fingers, one or more drain contact bars extending over a first set of the plurality of drain fingers and a first set of the plurality of source fingers in a second dimension that is orthogonal to the first dimension, and one or more source contact bars extending over a second set of the plurality of drain fingers and a second set of the plurality of source fingers in the second dimension.

Orthogonal transistor layouts

Discharge circuits, devices and methods. In some embodiments, a MEMS device can include a substrate and an electromechanical assembly implemented on the substrate. The MEMS device can further include a discharge circuit implemented relative to the electromechanical assembly. The discharge circuit can be configured to provide a preferred arcing path during a discharge condition affecting the electromechanical assembly. The MEMS device can be, for example, a switching device, a capacitance device, a gyroscope sensor device, an accelerometer device, a surface acoustic wave (SAW) device, or a bulk acoustic wave (BAW) device. The discharge circuit can include a spark gap assembly having one or more spark gap elements configured to facilitate the preferred arcing path.

Discharge circuits, devices and methods

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Andover, MA, United States of America

David Scott Whitefield