Jds Uniphase Corporation

Harris Corporation

David Schneider

Darrel Kanagy

John Randolph Bestermann

James Vincent Wernlund

James Allan Wilkerson, Jr

Christopher A Zuhlke

Jay J Pierce

A method and system for providing gain normalization in a MEMS control system and/or device includes moving a MEMS structure from a first position wherein light is redirected from a first input port to an output port to a second position wherein light is redirected from a second input port to the output port, dithering an orientation of the MEMS structure, monitoring an intensity of the dithered light and providing a feedback signal in dependence upon the monitored intensity, and using the feedback signal, determining a control loop gain for active alignment of the MEMS structure. Gain normalization is achieved by applying a fitting function, which is split into a gain control loop gain part and a mechanical part.

MEMS control system gain normalization

The invention relates to optoelectronic modules for generating and/or receiving optical signals for use in fiber-optic communication systems, such as optical transponders or transceivers, having a reconfigurable control and status (C&S) interface with a host device. The optoelectronic module includes an electrical multi-pin host connector having a plurality of pins for communicating a plurality of digital C&S signals between the host and the module, functional hardware responsive to the digital control signals and comprising sensing means for generating digital status signals, and processing means formed by an FPGA and a processor for processing the digital C&S signals. The FPGA is disposed in communications paths between the host connector on one side, and the functional hardware and the processor on the other side, and programmed for routing each of the discrete C&S signals between the C&S pins of the host connector and the processor, and between the C&S pins and the functional hardware, thereby providing reconfigurability of said routing by downloading a different set of FPGA instructions.

Flexible control and status architecture for optical modules

A method and system for reducing operational shock sensitivity of a MEMS device includes a closed-loop control circuit for controlling the MEMS device and a shock detector for detecting a shock experienced by the MEMS device. The closed-loop control circuit includes a movable MEMS structure, a detector for sensing a position of the MEMS structure and for providing a first feedback signal related to the sensed position, and a processor for receiving the first feedback signal and for providing a control signal used to control the MEMS device. The shock detector, which according to a preferred embodiment is the MEMS structure itself, is used for detecting the shock experienced by the MEMS device and for generating a second feedback signal, which is used to alter the control signal such that a response of the closed-loop control circuit to the shock is minimized.

Method and system for reducing operational shock sensitivity of MEMS devices

A microcontroller-based controller executes interleaved DC bias and gain control routines using monitored values of the monitored photocurrent output signal of a Mach-Zehnder laser modulator to derive a gain setting for the modulation drive signal and a bias level setting for the DC bias level, without tuning or adjustment. Subsequent to convergence of the gain and bias level settings, the control unit may repetitively interrupt and restart the DC bias and gain control routine at intervals that are staggered in a random time fashion, to achieve spectral dispersion of the gain and bias level settings, and provide insensitivity to periodic environmental noise.

Mach-Zehnder modulator bias and driver gain control mechanism

An apparatus and method of the present invention allows the digitally decoding of asynchronous communication signals and includes a sampling and storing circuit for sampling a digitally converted asynchronous communication signal and storing sampled signal values corresponding to negative edge signal values, positive edge signal values, and central signal values. A derivative calculating circuit is connected to the sampling of storing circuit for receiving at least negative edge signal values and positive edge signal values and calculating derivatives. A comparator circuit receives the calculated derivatives and compares the derivatives with the threshold based on the calculated negative derivative and produces negative output and positive output values used for determining a decoded output signal.

Apparatus and method for decoding asynchronous data using derivative calculation

An apparatus and method for digitally decoding an asynchronous data signal is disclosed. Analog communication signals are converted into binary signal values. A negative peak register and a positive peak register store the negative and positive peak signal values corresponding to the negative and positive peak signal values of the analog communication signal. A negative peak comparator and a positive peak comparator compares the positive and negative signal peaks of the currently received binary signal value with minimum negative and maximum positive peak signal values stored within the negative and positive peak registers, and updates the negative and positive peak registers with any new minimum negative and maximum positive peak signal values. A subtraction circuit subtracts the positive peak signal value from the negative peak signal value to determine the magnitude signal value corresponding to the difference between a binary zero and one. An addition circuit adds one-half of the magnitude signal value to the minimum negative peak signal value stored in the negative peak register to obtain a threshold signal value, which is then used to determine the mid-point reference.

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Melbourne, FL, United States of America

David Schneider