Intel Corporation

David S Vannier

James P Kardach

Gregory Scott Mathews

Sung Soo Cho

Cau L Nguyen

Kameswaran Sivamani

Edward S Zager

Shing Wong

Eric Cabot Hannah

Michael Francis O'Connor

Carol A Jacobson

A system for receiving and processing digital video information such as a digital television broadcast, includes a modular platform which receives a plurality of hot pluggable cards. The platform is coupled by a high data rate graphics bus to a digital television display. The bus may provide encrypted information to prevent piracy of the video. Because the platform is modular in design, upgrades to the digital video system may be easily implemented using hot pluggable technology without changing the display. Thus, advances in electronics may be incorporated into the platform without necessitating that the owner replace the display.

Digital video display system

A marking device is provided. The marking device (MD) includes an elongated housing that has a tip configured to contact a surface. The MD also includes a pressure sensor disposed within the housing. The pressure sensor is coupled to the tip and is configured to detect when the tip contacts the surface. The MD further includes first and second acceleration sensors disposed within the housing and adjacent the tip of the MD. The first and second acceleration sensors are configured to sense acceleration of the tip in first and second directions. Responsive to the sensing of acceleration, first and second acceleration sensors generate a signal indicative of acceleration in first and second directions. The MD also includes a conversion device configured to receive first and second signals and convert first and second signals into at least one computer readable signal.

Electronic pen device

A transparent system interrupt is invoked by the assertion of an electrical signal at an external pin of a microprocessor CPU chip. Upon assertion of this interrupt, the CPU begins program execution in a dedicated RAM area that is inaccessible both to the operating system and all application programs. A set of instructions, which may be unique to the system in which the CPU chip is installed, services the interrupt. Typically, the state of the CPU and associated components in the system immediately prior to assertion of the interrupt will be saved into the dedicated RAM area by the interrupt service routine. Recovery from the interrupt is accomplished upon recognition of an external event that invokes a RESUME instruction causing the CPU and associated components to be restored to exactly the same state that existed prior to the interrupt and in a manner entirely transparent to any program executing at the time of the interrupt.

Computer system with interrupts transparent to its operating system and

Transparent system interrupt

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Saratoga, CA, United States of America

David S Vannier