Xilinx, Inc.

David S Smith

Arvind R Bomdica

Xiaobao Wang

Balakrishna Jayadev

Samudyatha Suryanarayana

Andrew Tabalujan

Vinit Shah

Sing Keng Tan

Apparatus and associated methods relate to an I/O bank impedance calibration circuit having (a) a replica master resistor coupled to an external precision resistor, and (b) a control circuit configured to calibrate an output impedance of the master resistor to generate a calibrated code to control a replica slave resistor in each bank. In an illustrative example, a signal applied to the replica master resistor may be compared against a programmable reference signal. The control circuit may generate the calibrated code, in response to the comparison result, to calibrate the output impedance of the replica master resistor. By implementing the replica master resistor and the replica slave resistor, impedances of a large number of IOs or banks may be calibrated by the impedance calibration circuit using a single one reference pin.

Calibration of transmitter output impedance and receiver termination impedance using a single reference pin

An apparatus, and method therefor, relates generally to a transmitter. In such an apparatus, a decoder is configured to receive a data input and control signals and to generate state signals responsive to a control signal of the control signals and data polarity the data input. Select circuitry is configured to receive coded signals to replace the data input with a pull-up code and a pull-down code of the coded signals responsive to the state signals and the control signals for propagation of the pull-up code and the pull-down code in place of the data input.

Digitally-controlled impedance control for dynamically generating drive strength for a transmitter

An apparatus includes a plurality of adjustable driver circuits having output nodes coupled to a signal line. Each adjustable driver circuit is configured to drive the signal line with a portion of a total drive strength indicated by a value of a binary control signal. The apparatus also includes a delay circuit configured to delay the binary control signal provided to each adjustable driver circuit by a respective time period unique to the adjustable driver circuit.

Strength-adjustable driver

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Redwood City, CA, United States of America

David S Smith