L-3 Communications Corporation

Other

L3harris Technologies, Inc.

L-3 Communciations Corp.

David S Nelson

Osama Sami Haddadin

L Andrew Gibson

David G Landon

Carl Christensen

Ryan W Hinton

DeLon K Jones

Edwin J Hemphill

Lyman D Horne

Brad Terry Hansen

Michael D Pulsipher

Roland Richard Henrie

Brian G Yoho

Stephen A Laraway

Robert L Dickson

Scott Talbot

A radio frequency (RF) rake receiver may include a plurality of diversity receive paths, with each diversity receive path including a respective rake receiver despreader, and a tracking loop. The tracking loop may be configured to generate a composite timing signal based upon the rake receiver despreaders, and provide the composite timing signal to the diversity receive paths.

Rake receiver and related methods

Detecting timing of a synchronization sequence included in a data stream transmitted in a noisy channel. The synchronization sequence is a known data sequence purposely injected into the data stream for synchronization. A data stream waveform, is obtained from a noisy communication channel. The data stream waveform includes an instance of a synchronization sequence waveform. One or more samples of the synchronization sequence waveform are obtained. One or more samples of a model synchronization sequence waveform are obtained. The model synchronization sequence waveform models an expected waveform for the synchronization sequence being transmitted on the communication channel by applying the synchronization sequence to a model of the communication channel. The instance of the synchronization sequence waveform is correlated with the model synchronization sequence waveform by correlating one or more samples of the synchronization sequence waveform with the one or more samples of the model synchronization sequence waveform.

Synchronization through waveform correlation

A filter and method for finite impulse response filtering an input signal is described. In one embodiment, the filter includes an input circuit configured to receive input samples in parallel, where the parallel input samples correspond to sequential samples of the input signal. In another embodiment, the filter includes a coefficient memory configured to store filter response coefficients and output a subset of those coefficients corresponding to a selected decimation factor.

Finite impulse response filter with parallel input

A circuitfor upsampling and upconverting a high rate signal that is divided into M in-phase (I) symbols and M quadrature (Q) symbols. A Nyquist filterupsamples by a factor of k each of the 2M symbols in parallel during one system clock period (CP). The filterhas a plurality of 2kM filter components, that each provides a continuous output. A plurality of multiplierseach upconverts a filter component output with a carrier wave signalthat is output from a numerically controlled oscillator. A plurality of adderseach adds the output of two multipliersto recombine corresponding I and Q samples to output kM samples during a CP. For continuous phase modulation, N parallel bits are input into the filter, upsampled in one CP, and accumulated and modulatedin parallel in one CP. For analog processing, M (I) and M (Q) symbols are input into an FIR filterfor upsampling, and decimated at a MUX/DAC blockfor subsequent analog upconversion.

Parallel processing for programmable wideband digital modulation

A demodulator, suitable for use in a communication system and in a modem, has a block polyphase circuit with circuit blocks for different signal processing functions, particularly filtering, delay, and frequency conversion. The circuit blocks are arranged for parallel processing of different portions of an input sequence of signals. Signals of the input sequence to be filtered are divided among the blocks by a demultiplexer for processing at a clock frequency lower than a clock frequency of the input signal sequence. Signals outputted by groups of the circuit blocks are summed to produce an output signal of the group. Output signals of all of the groups are multiplexed to provide an output signal sequence such that the repetition frequency of the outputted signals may be higher, lower, or equal to that of the input signal sequence. This enables use of programmable circuitry operative at reduced clock rates.

Parallel DSP demodulation for wideband software-defined radios

A circuitfor upsampling and upconverting a high rate signal that is divided into M in phase (I) symbols and M quadrature (Q) symbols. A Nyquist filterupsamples by a factor of k each of the 2M symbols in parallel during one system clock period (CP). The filterhas a plurality of 2kM filter components, that each provides a continuous output. A plurality of multiplierseach upconverts a filter component output with a carrier wave signalthat is output from a numerically controlled oscillator. A plurality of adderseach adds the output of two multipliersto recombine corresponding I and Q samples to output kM samples during a CP. For continuous phase modulation, N parallel bits are input into the filter, upsampled in one CP, and accumulated and modulatedin parallel in one CP. For analog processing, M (I) and M (Q) symbols are input into an FIR filterfor upsampling, and decimated at a MUX/DAC blockfor subsequent analog upconversion.

A circuit for single or parallel digital fractional interpolation of data samples has a fractional interpolator filter, an oscillator for outputting timing signals to the fractional interpolator filter, and a detector loop with a strobe feedback from the oscillator for outputting a frequency adjustment to the oscillator. Three different approaches are shown to determine the frequency adjustment. One approach is to generate a pulse based on the symbol clock, and measure the differences between the pulse and the strobe and between the strobe and the pulse. The smaller is the frequency adjustment. Another approach is to adjust the strobe period to match the symbol clock period. A third approach is to add an oscillator-driven clock to the symbol clock and integrate the sum over a symbol clock period to generate the frequency adjustment. Preferably, the interpolator filter takes N parallel inputs and samples each in parallel based on a plurality of oscillator timing signals, each corrected with reference to the frequency adjustment.

Parallel fractional interpolator with data-rate clock synchronization

A method and system for cooperative transmission power control in a communication system is provided. The method, operating within a system having a base station and at least on mobile station, includes the step of providing a power control data structure having memory fields indexed according to a predetermined parameter set. The next step retrieves from one of the memory fields a transmission power control value and adjusts a transmission power level of the mobile station according to the retrieved value.

Cooperative transmission power control method and system for CDMA communication systems

A construction process and product thereof are provided which include affixing a construction medium simulating the appearance of solid stone to a construction frame to simulate a desirable appearance.

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Salt Lake City, UT, United States of America

David S Nelson