Westinghouse Electric Corporation

David S Korn

Francis W Hopwood

Stephen P Caldwell

Carl Deierling

A frequency divider uses a single D flip-flop integrated circuit having an inverted output and an asynchronous clear input between which a feedback loop comprising a delay Tau is connected. The frequency divider receives a multi-GHz input frequency f.sub.1, and divides by any integer N to produce an output frequency f.sub.2 =f.sub.1 /N using the internal delay of the D flip-flop between input and output (CK-to-Q), and the internal delay between the asynchronous clear input to the output (CLR-to-Q). Solving for the amount of delay Tau in the feedback loop necessary to produce the desired integer, or divide ratio, N, according to a predetermined formula is also required. An integrated circuit D flip-flop manufactured by Gigabit Logic is preferably selected to provide the high input frequency capability, external to which is added the feedback loop for determining the divide ration desired. The divide ratio, or integer by which the input frequency is divided, includes the ability to divide by a non-2.sup.n number.

Multi-GHz frequency divider

An oscillator circuit is coupled to receive first and second reference signals and includes a voltage-controlled oscillator for generating an oscillating signal. A difference frequency calculation circuit is coupled to the voltage-controlled oscillator to produce a count signal corresponding to a difference in frequency between the oscillating signal and the first reference signal. A feedback circuit is coupled to the difference frequency calculation circuit and coupled to receive the second reference signal which corresponds to a predetermined frequency for the oscillating signal. The feedback circuit provides a control signal as an input to the voltage-controlled oscillator to control the frequency of the oscillating signal. The method for tuning the voltage-controlled oscillator which generates the oscillating signal includes a step of calculating a difference in frequency between the oscillating signal and a first reference signal, and generating a count signal corresponding to the difference in frequency. The count signal is compared to a reference count signal corresponding to a predetermined frequency for the oscillating signal, and an error signal is generated based on the results of the comparison. The error signal and a prepositioning signal corresponding to the predetermined frequency for the oscillating signal are added to generate a control signal which is provided to the voltage-controlled oscillator to control the frequency of the oscillating signal.

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Washington, DC, United States of America

David S Korn