Sun Microsystems, Inc.

X Development LLC

Oracle International Corporation

David S Allison

Nathan F Pooley

Craig Latimer

Martin Patterson

Ariel Cohen

Ashok Krishnamurthi

Pavani Naishadh Diwanji

Geoffrey G Baehr

Liang T Chen

Cheng Tang

Jeffrey M Broughton

Michael R Sheridan

Viswanath Krishnamurthy

Frank Salzmann

Steven Peart

Earl T Cohen

James B Burr

Ashley N Saulsbury

David R Emberson

Ankur Narang

Thomas M McWilliams

William K Lam

Michael W Parkin

Derek E Pappas

Nyles I Nettleton

Jeffrey B Rubin

Ping-Chih Wu

Mohamed Soufi

Michael S Ball

Elliot Poger

Deepankar Bairagi

Nasser Nouri

Cristina N Cifuentes

Oyekunle A Olukotun

Raphael Jacoby

A method includes creating a publisher configured to send messages over a channel having a shared memory. The method includes creating at least one subscriber configured to receive the messages over the channel by sequentially referencing memory slots of the plurality of memory slots. The method includes determining that the next sequential memory slot is currently referenced by a subscriber. The method includes delaying sending the message by the publisher based on determining that the next sequential memory slot is currently referenced by the subscriber. The method includes receiving an event trigger indicative of message reading by the subscriber. The method includes, responsive to receiving the event trigger, determining that the next sequential memory slot is not currently referenced. The method includes sending the message to the next sequential memory slot based on determining that the next sequential memory slot is not currently referenced.

Systems and methods for inter-process communication within a robot

Provided is a novel approach for connecting servers to peripherals, such as NICs, HBAs, and SAS/SATA controllers. Also provided are methods of arranging peripherals within one or more I/O directors, which are connected to the servers over an Ethernet network. Such arrangement allows sharing the same resource among multiple servers.

Remote shared server peripherals over an ethernet network for resource virtualization

Techniques are provided for making data stored in channels of shared memory available across a communication network that couples multiple distinct processing units (e.g., of a robot). In various implementations, a channel may be established in shared memory of a first processing unit. A publisher process executing on the first processing unit may publish data to the channel, and a remote subscriber process executing on a second processing unit may subscribe to the channel. A persistent network connection over a communication network may be established between the first and second processing units. Data published to the channel by the publisher process may be read directly from the local memory of the first processing unit by or on behalf of one or more local subscriber processes, and may be transmitted over the communication network to the remote subscriber process using the persistent network connection.

Dynamic exchange of data between processing units of a system

Provided is a novel approach for connecting servers to peripherals, such as NICs, HBAs, and SAS/SATA controllers. Also provided are systems for arranging peripherals within one or more I/O directors, which are connected to the servers over an Ethernet network. Such arrangement allows sharing the same resource among multiple servers.

Remote shared server peripherals over an Ethernet network for resource virtualization

A method for compiling a logic design includes inputting a logic design and an input file into a plurality of compilers, respectively, where the logic design comprises a plurality of modules, compiling separately the plurality of modules into a plurality of object files, and linking the plurality of object files to execute the logic design.

Compiling and linking modules of a cycle-based logic design

A system for tracing signals for a cycle-based simulation includes a traced signal and a system resources availability information of the cycle-based simulation, a runtime compiler configured to use the system resources availability information to assign a system resource to trace the traced signal, a logic design used with the system resources availability information to generate a simulation image, a first value of the traced signal generated by execution of a simulation image, and a traced signal buffer configured to store the first value and upload the first value.

System and method for efficiently tracing simulation data in hardware acceleration simulation systems

The present invention provides a method and apparatus by which functions may be derived from other functions in a programming language. A function is essentially processed as a class, except that the object is automatically destructed after the final line of code is executed. In one or more embodiments of the present invention, a function has the ability to inherit from a superfunction. Inheritance in this context means that all functions in the hierarchy execute in order from the lowest level superfunction to the derived function invoked by the calling statement. Further, the derived function has access to all nonprivate methods and variables defined in the superfunctions. All functions in the hierarchy remain instantiated until the derived function has executed. At this point, the functions are destructed in reverse hierarchical order. If a function in the hierarchy enters an error condition, the execution process is halted.

Method and apparatus for deriving functions from other functions in a programming language

A method and apparatus for computation is provided. A main cluster crossbar is connected to a plurality of statically scheduled routing processors. A first sub-cluster crossbar is associated with a first one of the plurality of statically scheduled routing processors where the first sub-cluster crossbar is connected to a first plurality of execution processors. A second sub-cluster crossbar is associated with a second one of the plurality of statically scheduled routing processors where the second sub-cluster crossbar is connected to a second plurality of execution processors.

Method and apparatus for simulation processor

The present invention provides a method and apparatus for implementation of an input/output stream operator in a dynamically typed language. This operator is built into the language, and allows a value of one type to be streamed to a value of another type by taking the form fromvalue&#x2192;tovalue. Since the programming language is dynamic, the type of values on either side of the &#x2192; operator is of any supported type, and can be modified depending upon the type of operands. For example, a value of any type can be streamed to a value of type 'stream'. In this instance, the destination value is attached to, for example, a device such as a terminal or disk drive. A value of type 'stream' can also be streamed into a value of any type. In this instance an external source is inputted, for example, into a program.

Stream operator in a dynamically typed programming language

The present invention provides a method and apparatus for the lexical analysis of computer source code. The lexical analyzer is dynamically configured at runtime to recognize a one or more reserved words or operators. Thus, the analyzer has the ability to interact with multiple languages. In one or more embodiments of the present invention, the analyzer is instantiated by a host application, for example, the parser of a compiler. The host application adds a list of tokens to the analyzer that must be recognized. These tokens comprise at least a subset of the reserved words and operators of the computer language. In one embodiment, the host application then queries the analyzer for the next token in the source code. In another embodiment, tokens are added during the query phase as needed. In a separate embodiment, tokens are dynamically removed from the analyzer as the needs of the host application change.

Method and apparatus for dynamic configuration of a lexical analysis parser

The present invention provides a method and apparatus for statement boundary detection. In one embodiment of the present invention, a parser determines a natural end of a statement, where possible, based upon the context of the input stream and the syntax of the programming language. Thus, no statement terminator is necessary when a natural end to a statement is determined. The parser uses the natural end of a statement to terminate one statement and begin parsing another statement. In one embodiment, a special statement termination token is required to terminate a statement when no natural statement end exists. In another embodiment, a special statement termination token can be used to terminate a statement when a natural end of the statement exists.

Method and apparatus for statement boundary detection

A system and method for processing a variable looping statement into a constant looping statement to enable loop unrolling. A lower bound and an upper bound of the loop index within the variable looping statement are determined. A constant looping statement is then formed using the lower bound and upper bound to define a range over which the loop index varies within the constant looping statement. The constant looping statement further includes a conditional statement that reflects conditions in the initial expression and/or the exit expression of the variable looping statement. The conditional statement controls execution of the body of the generated constant looping statement, which includes the body from the original variable looping statement. Loop unrolling may then be performed on the generated constant looping statement.

Method of transforming variable loops into constant loops

A system for generating native code of a software application includes a page table indexing a plurality of pages using a page pointer, wherein the page pointer includes an address of at least one of the plurality of pages, a memory cache including a page table cache and a page cache, and a statically-generated executable code to obtain data on at least one of the plurality of pages using the memory cache.

Growing community of inventors

San Ramon, CA, United States of America

David S Allison