Nxp Usa, Inc.

David Robert Currier

Darrell Glenn Hill

Alan J Magnus

Congyong Zhu

Fred Reece Clayton

Warren Crapse

A transistor device includes a semiconductor substrate and a gate structure formed over the substrate. When fabricating the transistor device, at least one dielectric layer may be formed over ohmic contact structures of the transistor device, which may mitigate migration of material, such as metal, from the ohmic contact structures onto sensitive surfaces of the transistor device during subsequent fabrication processes. The transistor device may include one or more dielectric spacers, including at least one dielectric spacer disposed at a side wall of a gate channel through which gate structure contacts the substrate. The transistor device may include a field plate formed at least partially over the gate structure, the field plate having one or more stepped portions, which may improve linearity performance of the transistor device.

Transistor with defect mitigation structures

A method of making a semiconductor device is provided for depositing, patterning, and developing photoresist () on an underlying layer located on a backside of a wafer having a frontside on which an integrated circuit die are formed over a shared wafer semiconductor substrate and arranged in a grid, thereby forming a patterned photoresist mask with a unique set of one or more openings which are used to selectively etch the underlying layer to form, on each integrated circuit die, a unique die mark identifier pattern of etched openings in the underlying layer corresponding to the unique set of one or more openings in the patterned photoresist mask (), where the patterned photoresist mask is removed () from the backside of the wafer before singulating the wafer to form a plurality of integrated circuit devices () which each include a unique die marking.

Growing community of inventors

Mesa, AZ, United States of America

David Robert Currier