General Dynamics C4 Systems, Inc.

Altera Corporation

General Dynamics Government Systems Corporation

David Richardson King

Gerardo Orlando

Mark Krumpoch

Sridhar Krishnamurthy

Venkat Yadavalli

Mark A Krumpoch

Scott E Lane

Peter Markou

W Douglas Strubeck

Ken Clauss

Evan Custodio

A transceiver with non-deterministic delay characteristics is analyzed and adjusted to provide a transceiver with deterministic delay characteristics. The transceiver may be implemented with a variety of device types to support high bandwidth operation over a wide range of frequencies. Deterministic behavior allows use of the transceiver in source synchronous interfaces. The transceiver may also be dynamically analyzed and adjusted during operation as operation frequency changes.

Wide band deterministic interface

A processing system () includes an input interface (), a first processor (), a second processor (), and an output interface () arranged in a serial configuration. Each of the input interface (), first processor (), second processor (), and output interface () computes a digest (, and) using information, e.g., a unique parameter (), known only by that element () and using information generated by that element (). The digests (and) are used to validate the integrity of payload data () processed by the system () to form processed data () and the system () only outputs the processed data () upon validation of data integrity. The serial configuration of system () may be implemented to provide high bit rate, redundant cryptographic services.

Serial architecture for high assurance processing

Systems and methods efficiently process digests, hashes or other results by performing multiplicative functions in parallel with each other. In various embodiments, successive processing stages are provided, with each stage performing parallel multiplicative functions and also combining input terms to reduce the total number of terms that remain to be processed. By progressively combining the active terms into a smaller number of terms for subsequent processing, the time needed to process a result can be significantly reduced.

Systems and methods for efficiently creating digests of digital data

A method and system for logical multicasting on an Asynchronous Transfer Mode (&ldquo;ATM&rdquo;) switch. There is a logical replication of cells on the same physical port of the ATM switch. A block of consecutive CIs is used by the controller in the switch to create new cells. The CIs are used to control the flow through the switch and for updating the VPI and VCI. These routing tags are part of the header information and multicast to the same physical port

Asynchronous transfer mode switch with logical multicasting

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Shrewsbury, MA, United States of America

David Richardson King