The Secretary of State for Defence in Her Britannic Majesty's Government

Qinetiq Limited

Marconi Caswell Limited

David R Wight

John M Heaton

Meirion F Lewis

John C Vokes

Brian T Hughes

Christopher L West

William James Stewart

David John Robbins

Roger Timothy Carline

Stephen Gerard Ayling

Michael J Kane

Weng Y Leong

David C W Herbert

Edward T R Chidley

John Michael Boud

Reuben Redstone

Michael B Allenson

Nicola Shaw

Colin M Boyne

David Lee

A horizontal access semiconductor photo detector () comprises a horizontal light absorbing layer () for converting light into photo-current which layer is configured to confine light within it in whispering gallery modes of propagation. The detector is configured to have a first waveguide portion () and a second light confining portion () arranged such that the waveguide portion couples light into the detector and transfers light into the light confining portion so as to excite whispering gallery modes of propagation around the light confining portion. The light absorbing layer may be part of the light confining portion or alternatively light can be coupled into the light confining portion or alternatively light can be coupled into the light absorbing layer from the light confining portion by evanescent coupling. The excitation of whispering gallery modes within the light absorbing layer significantly increases the effective absorption coefficient of the light absorbing layer.

Horizontal access semiconductor photo detector

A light emitting device for generating at least one beam of output radiation from an input current of electrons comprises at least two p-n junction devices for converting the input current of electrons into photons, wherein the p-n junction devices are electrically connected in series such that the input impedance of the light emitting device is substantially equal to the sum of the individual impedance of the p-n junction devices. Hence the quantum efficiency of the light emitting device is substantially equal to the sum of the individual quantum efficiencies of the p-n junction devices. In a preferred embodiment, the light emitting device comprises a plurality of p-n junction devices connected in series such that the input impedance of the light emitting device is equal to 50 &OHgr; without the need for additional circuitry or impedance matching elements. The device may therefore have a 50 &OHgr; impedance over a broad frequency band, limited by the modulation frequency limit of the individual p-n junctions. Typically, the p-n junctions may be AlGaAs, AlGaInP, AlGaInAs or AlGaInAsp laser diode devices. The invention also relates to an optically coupled bipolar transistor device.

Light emitting device and transistor

An optical modulator includes an optical input; an optical output; at least one optical path connecting the optical input and output; and an electrode structure for selectively changing the optical characteristic of a part of the at least one optical path in response to a control signal such as to modulate light passing along the optical path. The optical path further includes a structure which slows the passage of light along the part of the optical path to enhance the modulation effect of the modulator for a given length of optical path. Preferably the structure comprises a sequence of coupled resonator structures in which each resonator structure is defined by a pair of partially reflecting planes which define an optical resonator cavity within the optical parts.

Optical modulator

A device for spatially separating components of frequency in a primary radiation beam comprising means for separating the primary radiation beam into a plurality of secondary radiation beams, a plurality of electrically biasable waveguides forming a waveguide array, each for transmitting a secondary radiation beam to an output, wherein each waveguide has an associated optical delay line having a corresponding optical delay time, wherein each of the optical delay times is different. The device also comprises means for applying a variable electric field across each of the waveguides such that the phase of the secondary radiation beams transmitted through each may be varied by varying the electric field. The secondary radiation beams output from each of the waveguides interfere in a propagation region with a secondary radiation beam output from at least one of the other waveguides so as to form an interference pattern comprising one or more maximum at various positions in the propagation region.

Electrically tuneable optical filter

Mid infrared light emitting diode

An electro-optic waveguide device (10) comprises an assembly of waveguides (30) connected to a common light input region (41) and forming a common far field diffraction pattern (44). The device (10) comprises an n.sup.+ GaAs substrate (14) bearing a waveguide lower cladding layer (16) of n.sup.+ Ga.sub.0.9 Al.sub.0.1 As, which is in turn surmounted by a waveguide core layer (18) of n.sup.- GaAs. The layer (18) has grooves (20) defining the waveguides (30), each of which has a respective Schottky contact (32). Each contact (32) is biased negative with respect to the substrate (14), which reverse biases the respective Schottky diode waveguide structure. The waveguide core layer (18) has electro-optic properties, and its refractive index varies with electric field. The phase of light emerging from each waveguide is therefore independently variable by means of its applied bias voltage. The waveguides (30) are arranged to provide output confined very largely to lowest order spatial modes, so that they produce a single far field diffraction pattern (44). Varying the set of bias voltages applied to the waveguides (30) produces output phase variation which changes the position of the diffraction pattern principal maximum (46) to produce beam steering.

Electro-optic waveguide device

Oscillator

A method of fabricating a field effect transistor comprising the steps of forming an active layer of semiconductor material (GaAs) over a surface of a first substrate of semiconductor material (GaAs), applying a second substrate of insulating material, e.g. glass, over the surface of the active layer, removing the first substrate so that the active layer is now supported on the insulating second substrate, and forming source, drain and gate electrodes over the free surface of the active layer. To facilitate removal of the GaAs first substrate by selective etching, a buffer layer of GaAlAs resistant to the GaAs etchant, may be formed between the active layer and the first substrate, which buffer layer is removed, following removal of first substrate, using a selective etchant to which the GaAs active layer is resistant. The technique is particularly applicable to high frequency FETs requiring a very thin active channel region interfaced to a substrate having good insulating properties.

Field effect devices and their fabrication

A method of fabricating a field effect transistor comprising the steps of forming an active layer of semiconductor material, e.g. GaAs over the surface of a first substrate of semiconductor material, e.g., also GaAs, forming source, drain and gate electrodes over the surface of the active layer, applying a second substrate of insulating material to the surface of this structure, and removing the first substrate. To facilitate the removal of the GaAs first substrate by selective etching, a buffer layer of GaAlAs resistant to the GaAs etchant may be formed between the first substrate and active layer, which buffer layer is removed, following removal of the first substrate, using a selective etchant to which the GaAs active layer is resistant. A second gate electrode may be formed on the active layer following removal of the first substrate. The technique is particularly applicable to high frequency FET devices.

A method of fabricating a field effect transistor comprising the steps of forming an active layer of semiconductor material, e.g., GaAs, over a surface of a first substrate of semiconductor material, e.g., also GaAs, forming a gate electrode on the surface of the active layer, applying a second substrate of insulating material to the surface of this structure, removing the first substrate, and forming source and drain electrodes on the opposite surface of the active layer to the gate electrode. To facilitate removal of the GaAs first substrate by selective etching, a buffer layer of GaAlAs resistant to the GaAs etchant, may be formed between the active layer and the first substrate, which buffer layer is removed, following removal of the first substrate, using a selective etchant to which the GaAs active layer is resistant. A second gate electrode may be formed on the opposite surface of the active layer to that on which the first gate electrode is formed. The technique is particularly applicable to high frequency FET devices.

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Malvern, United Kingdom

David R Wight