Other

Space Micro, Inc.

Space Electronics, Inc.

Maxwell Technologies, Inc.

David R Czajkowski

David J Strobel

Darrell Sellers

Janet Patterson

Neil Eggleston

Bernard Gudaitis

James C Marshall

Parties are enabled to exchange data without knowing the other party's encryption key. Cells in one party's database each form an object which is encrypted at the object level. Authentications and authorizations are incorporated into each object. An encryption management engine produces different keys for each objects. A security server database stores a key registered by one party. The in a later request by the party is compared to its registered key. A protocol and key management method allow identification and access to an appropriate key using only publicly available information. A set of data is added with a secured session key. A selected set of data is used to create a cryptographically secure Header-Tx with a secured session key and an Access Control List with an embedded security policy. Data is sent to a receiver only when authorized by the customer authentication security server.

Object level encryption system including encryption key management system

An apparatus for brushing the hair of dogs and other animals. The apparatus comprises a hair brush with a depth guide that prevents the bristles from contacting the epidermis of the animal while its hair is brushed. Preventing the bristles from contacting the epidermis of the animal helps prevent injury and discomfort to the animal during grooming.

Pet hair brush

A symmetric PGP encrypted communications path is provided in which the recipient may be identified with only publicly available information. Data to be encrypted is encrypted at the object level. Encryption keys for both the transmitter and receiver are sent to a security server. Data received from the transmitter includes intended receiver ID. The receiver includes its actual ID. The received ID and the actual ID are sent to the security server for authentication. If authentication succeeds, the security server sends a session key to the receiver, and the receiver can use its own key to decrypt data. The system reacts to authentication failure by disabling decryption in the receiver and may also take countermeasures.

In an integrated circuit a microwave signal is routed through a selected signal path. Routing is accomplished by switching to determine the signal path. Control signals are applied remotely. The microwave integrated circuit is programmable by virtue of the ability to command selection of a signal path. The signal path is chosen to include or avoid selected 'RF functional elements,' i.e., components through which radio frequency signals may be routed. RF functional elements may include, for example, amplifiers, mixers, attenuators, and phase shifters. Aspects of programmability in the integrated circuit include the provision of the functional circuit elements for selectable connection in signal paths, the switching and interconnect technologies used to switch and connect between them, and the arrangement of the functional circuit elements in relationship to each other.

Programmable microwave integrated circuit

A redundancy system in a fault tolerant computer comprises a multiple core processor which may support a real time operating system. The multiple core machine may be actual or virtual. Multiple identical instructions, e.g., three instructions, are executed redundantly so that the redundancy system can detect and recover from a single event upset (SEU). The instructions are also displaced in time. In one form, two non-consecutive instructions are run on one core which is virtualized into two cores. Alternatively, a second actual core may provide symmetric processing. The system prevents single event functional interrupts (SEFIs) from hanging up the processor. Each core may run a separate operating system. When a first core hangs up a first operating system, the second operating system takes over operation and the processor recovers. Embedded routines may store selected data variables in memory for later recovery and perform an SEFI 'self-test' routine.

Radiation hard and fault tolerant multicore processor and method for ionizing radiation environment

A new method for the detection and correction of environmentally induced functional interrupts (or 'hangs') induced in computers or microprocessors caused by external sources of single event upsets (SEU) which propagate into the internal control functions, or circuits, of the microprocessor. This method is named Hardened Core (or H-Core) and is based upon the addition of an environmentally hardened circuit added into the computer system and connected to the microprocessor to provide monitoring and interrupt or reset to the microprocessor when a functional interrupt occurs. The Hardened Core method can be combined with another method for the detection and correction of single bit errors or faults induced in a computer or microprocessor caused by external sources SEUs. This method is named Time-Triple Modular Redundancy (TTMR) and is based upon the idea that very long instruction word (VLIW) style microprocessors provide externally controllable parallel computing elements which can be used to combine time redundant and spatially redundant fault error detection and correction techniques. This method is completed in a single microprocessor, which substitute for the traditional multi-processor redundancy techniques, such as Triple Modular Redundancy (TMR).

Functional interrupt mitigation for fault tolerant computer

A new method for the detection and correction of errors or faults induced in a computer or microprocessor caused by external sources of single event upsets (SEU). This method is named Time-Triple Modular Redundancy (TTMR) and is based upon the idea that very long instruction word (VLIW) style microprocessors provide externally controllable parallel computing elements which can be used to combine time redundant and spatially redundant fault error detection and correction techniques. This method is completed in a single microprocessor, which substitute for the traditional multi-processor redundancy techniques, such as Triple Modular Redundancy (TMR).

Fault tolerant computer

A non-hardened processor is made fault tolerant to SEUs and SEFIs. A processor is provided utilizing time redundancy to detect and respond to SEUs. Comparison circuitry is provided in a radiation hardened module to provide special redundancy with the need to run additional processors. Additionally, a hardened SEFI circuit is provided to periodically send a signal to the process which, in the case of a processor not in the SEFI state, initiates production by the processor of a 'correct' response. If the correct response is not received within a particular time window, the SEFI circuit initiates progressively severe actions until a reset is achieved.

SEU and SEFI fault tolerant computer

A radiation shielded and packaged integrated circuit semiconductor device includes a lid secured to a base to enclose an integrated circuit die within, wherein the lid and the base are each constructed from a high Z material to prevent radiation from penetrating therethrough. Another embodiment includes a die attach slug constructed from a high Z material disposed between the integrated circuit die and the base, in combination with a high Z material lid to substantially block incident radiation.

Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages

A method and apparatus for providing multiple layer encrypted Internet, Intranet, or e-mail communication device communications. In particular, the process of encrypting Internet, Intranet, or e-mail messages with encryption algorithms embedded in integrated circuits incorporated into the communication device, with access to the encrypting circuit requiring a validation of a randomly generated cypher key and an user defined password.

Encrypted internet and intranet communication device

An apparatus is disclosed for improving the Single Event Latchup (SEL) performance of an integrated circuit device (IC), or grouping of devices (as an example Multi-Chip Modules or MCMs), through the addition of active electronic circuitry integrated within the IC or MCM package. This circuitry and the protected device can be incorporated within the same physical dimensions and electrical configuration as the original integrated circuit device. The circuitry turns a destructive Latchup of a device into a recoverable event, allowing electronic devices that where unsuitable for the space environment due to SEL to be useable in the space environment.

Radiation induced single event latchup protection and recovery of

A new and improved process by which plastic material forming the plastic body package of an integrated circuit is selectively removed and replaced with a radiation shield having a specific formulation that is customized for a given radiation environment dependent upon the space application in which the integrated circuit is to be used.

Radiation shielding of plastic integrated circuits

The invention discloses a method for making two sided Multi-Chip Modules (MCMs) that will allow most commercially available integrated circuits to meet the thermal and radiation hazards of the spacecraft environment using integrated package shielding technology. The invention describes the technology and methodology to manufacture MCMs that are radiation-hardened, structurally and thermally stable using 3-dimensional techniques allowing for high density integrated circuit packaging in a radiation hardened package.

Growing community of inventors

Encinitas, CA, United States of America

David R Czajkowski