Analog Devices,inc.

M/a-com Eurotec

David Philip Burton

Eugene Heaney

Pierce Joseph Nagle

Peter Real

Finbarr Joseph McGrath

Guido Retz

A differential variable gain amplifier () comprises eight identical variable gain stages (to) which are arranged in two groups, namely, a high gain group () and a low gain group (). The first gain stage () is coupled directly to a pair of positive and negative main input terminals () for receiving a differential input signal to be amplified. A pair of voltage divider impedance chains () comprising identical capacitors (Cto C) define taps (to) through which the input signal is applied to the corresponding gain stages (to) in progressive steps of attenuation. Each gain stage () comprises a pair of identical variable gain amplifier elements () which amplify the respective positive and negative ends of the differential input signal. Only one of the gain stages (to) is selected at any one time by a control circuit. The outputs from the gain stages () of the high gain group () are applied to positive and negative high gain output terminals (). The output of the gain stages () of the low gain group () are applied on positive and negative low gain output terminals (). A pair of selectively activatable shunt-shunt feedback circuits () each comprising a variable gain feedback amplifier () provide variable shunt impedance at the main input terminals () for maintaining the input impedance of the variable gain amplifier () within a predetermined input impedance range as the gain of the variable gain amplifier () is varied, and when the variable gain amplifier () is operating at the high end of its gain range. A passive shunt impedance circuit () comprising a plurality of resistive shunt impedance elements are independently selectively shuntable across the main input terminals () for maintaining the input impedance of the variable gain amplifier () within the predetermined input impedance range when the variable gain amplifier () is operating at the low gain end of its gain range.

Variable gain amplifier

A transmitter for directly modulating an RF carrier with a complex baseband waveform comprises a programmable device adapted to generate amplitude and phase information collectively corresponding to a complex baseband waveform, a signal generator adapted to generate an RF carrier whose phase is responsive to phase information generated by the programmable device, a plurality of delta modulators, and an amplifier coupled to the signal generator and receiving the RF carrier with phase information. Each delta modulator is operative to sample an error signal at a time period offset from all other delta modulators to thereby generate streams of pulses collectively approximating the amplitude information. The supply voltage of the amplifier is adjusted in accordance with approximated amplitude information represented by the streams of pulses generated by the delta modulators. Specifically, the supply voltage is adjusted such that the output voltage of the amplifier varies substantially linearly with changes in the supply voltage. In this manner, both the amplitude information and the phase information are both impressed upon the RF carrier.

System and method for transmitting digital information using interleaved delta modulation

A CMOS DAC with means to avoid leakage current. In one embodiment, the back gates of the CMOS switches are held at -200 mV with respect to the output lines, and the logic low level to the off switch also is set at -200 mV relative to the output lines. In another embodiment, the CMOS switches are ion-implanted. In a still further embodiment, the output lines are held at a potential 200 mV more positive than the P- well of the CMOS switches.

Low leakage CMOS D/A converter

A signal-controllable attenuator comprising a 17-bit multiplying-type digital-to-analog converter having an R/2R ladder network to set the bit weights, and controlled by a 6-bit remotely-generated command signal to vary the attenuation in steps of 1.5 dB through a range of 88 dB. The 1.5 dB steps are controlled by a 4-bit code signal responsive to two bits of the command signal. The 4-bit code signal is directed to four successive bit input terminals of the converter. Which four DAC input terminals are selected is controlled by a shifting matrix which shifts the four bits along the DAC input terminals to a position determined by the other four bits of the command signal.

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Limerick, Ireland

David Philip Burton