International Business Machines Corporation

David P Parker

Howard Smith Landis

Jeanne-Tania Sucharitaves

Geoffrey K Abbott

A method, system and program product for replacing isotropic hole shapes in a wiring layout with non-equiaxial hole shapes that are arranged in a direction of current flow, which increases current flow along the wire's longitudinal axis while decreasing current flow along the wire's transverse axis. One aspect of the invention includes a method including determining a direction of electrical current flow in a portion of a wiring layout; and placing at least one non-equiaxial hole shape within the portion of the wiring layout, wherein the non-equiaxial hole shape is arranged in the direction of electrical current flow. The invention accommodates the limitations of copper CMP within an automated tool without sacrificing the efficiency of a hand-tuned layout. The invention also includes a semiconductor device including at least one non-equiaxial hole shape.

Current-aligned auto-generated non-equiaxial hole shape for wiring

A mask system for use by a lithographic system to project an image of a circuit design. The design includes at least one large feature and at least one nearby small feature. The mask comprises one or more shapes on a mask to project an image of the nearby small feature and, on the same mask or on a different mask, an opaque shape to project an image of the large feature. The opaque shape includes in a field thereof at least one dummy clear shape of size and configuration insufficient to be resolved. Light from the lithographic projection system may be projected through the opaque shape and the dummy clear shape to resolve an image of the large circuit feature on a resist layer of a wafer without resolving the clear shape on the resist layer, while simultaneously increasing optical flare on the resolved large circuit feature image.

Structure and method for sub-resolution dummy clear shapes for improved gate dimensional control

A method and system of determining a localized measure of regional pattern density in a fabrication process of a chip are disclosed. In one embodiment, the method includes determining pattern density values for each cell of a plurality of cells of interest; averaging the pattern density values for each cell within a first selected region about a target cell to determine the localized measure of regional pattern density for the target cell; storing the localized measure of regional pattern density for the target cell; and repeating the averaging and the storing for each of the plurality of cells. The simplification of data allows for a localized measure of regional pattern density determination in much less time than conventional techniques.

Growing community of inventors

Maricopa, AZ, United States of America

David P Parker