Storage Technology Corporation

International Business Machines Corporation

Quantum Corporation

David P Haldeman

James Joseph Touchton

Michael Richard Crater

John P Hill

Edde Tin Shek Tang

Galen G Kerber

Anthony J Casorso

David C Robbins

Charles Sander

Rodger D Haugan

Apparatuses and methods for utilizing error correction code in a data buffer or data storage device. In one variation, a single memory device is utilized to store both the data and the associated error correction code. The data and the associate error correction codes are stored on separate memory banks on the memory device. The error correction code may be consolidated into one or more regions on the memory device to improve the utilization of the available memory space on the memory device. In addition, by utilizing separate memory banks to store the data and the associated error correction code, the data and the error correction code can be accessed in an overlapping manner.

Method and apparatus for implementing error correction coding in a random access memory

A circuit for measuring voltage of a battery or group of batteries whose terminals are not directly accessible. The battery or group of batteries can have three leads. First and second leads are connected to the voltage output of the battery and the third lead is connected to the return of the battery. The three leads may terminate in a three prong plug which may plug into a printed circuit board to form a module. The module can be connected into a rack via an edge connector. A battery voltage measurement circuit can be located on another printed circuit board which is also plugged into the rack. This other printed circuit board may be interconnected to the battery module by wire traces within the rack. Thus, there are one or more first connectors between the first lead of the battery or group of batteries and the charger. There are one or more second connectors between the second lead of the battery or group of batteries and an input of the voltage measurement circuit. There are also one or more third connectors between the third lead of the battery or group of batteries and ground. A first portion of the voltage measurement circuit measures a voltage across the one or more first connectors and the one or more second connectors. A second portion of the voltage measurement circuit determines a difference between the voltage across the one or more first connectors and the one or more second connectors and a voltage measured across the one or more second connectors, the battery and the one or more third connectors to indicate an approximate voltage of the battery or group of batteries. There is negligible voltage drop across the one or more second connectors. Thus, the circuit accurately measures the battery voltage during charging, because it cancels significant voltage drops across the intervening connectors.

Apparatus for accurately measuring battery voltage

The dynamically mapped data storage subsystem generates a two error correction, three error detection code of extent sufficient to cover not only the data but also the corresponding memory address for each data record stored therein. The error correction code is transmitted and stored with the data within the data storage subsystem to ensure the integrity of both the data and its memory address.

Method and apparatus for ensuring data integrity in a dynamically mapped

The data storage subsystem of the present invention uses a large plurality of small form factor disk drives to implement an inexpensive, high performance, high reliability disk drive memory that emulates the format and capability of large form factor disk drives. The data transmitted by the associated computer system is used to generate redundancy information which is written with the data across N+M disk drives in a redundancy group in the data storage subsystem. To clear the redundancy accumulator memory, an associated pointer memory is used to indicate the ones of the redundancy accumulator memory byte positions that were used in the previous redundancy calculation. As data is received from the computer system, the pointer memory is checked to determine whether this next byte position need be reset to erase the previously stored redundancy calculation residue. If not, the data is simply stored therein.

Redundancy accumulator for disk drive array memory

An automatic velocity calibrator for a head positioning servo system in a magnetic disk drive performs a velocity calibration in a single pass over the magnetic disks by measuring actuator velocity and adjusting the gain of the velocity transducer in a series of successive approximations. Velocity is determined by turning a timer on in response to a track crossing and turning the timer off after at least two successive track crossings have been detected. A plurality of velocity measurements are stored and averaged. The average velocity is compared to a constant velocity command and an 8-bit latch is incremented or decremented in response to this comparison. A digital to analog converter produces a reference for an automatic gain control amplifier in the servo system which in turn adjusts the velocity transducer gain.

Growing community of inventors

Broomfield, CO, United States of America

David P Haldeman