Agilent Technologies, Inc.

David N Sontag

Richard A Nygaard, Jr

Jeffrey Erickson Roeca

Jennifer Shay

Frank D Simon

A system that allows an end user to optimize the performance of a logic analyzer quickly and easily is disclosed. A visual display allowing a user to see a data valid window and relative sample positions is provided. Direct graphical manipulation of the sample position allows for quick and accurate setting of sample positions. The present invention provides a graphical user interface generally comprised of the following components: a stable and transitioning data display; bus/signal labels; sample position time scale; an information icon; a timestamp icon; a graphical representation of suggested and selected sample position; a text display of selected sample position; and a legend. The present invention sets up the logic analyzer to correctly sample data from high speed, low margin systems. It measures data signals from the device under test relative to the user's state clock and automatically suggests the sampling position offset for each channel of the analyzer. The present invention allows the user to accept the suggestions or select alternative sampling positions manually.

Signal transition and stable regions diagram for positioning a logic analyzer sample

Provided is a graphical user interface for a logic analyzer that allows for simplified clock configuration selection. The graphical user interface consolidates all clock selection functions onto a single screen, allowing for ease of understanding and navigation.

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Colorado Springs, CO, United States of America

David N Sontag