International Business Machines Corporation

David Michael Hyde

William Kress Bodin

James Gordon Wilkinson

Tatchi Placido Lay

Susan Yee

A method and apparatus are disclosed for providing exchange of data between a peripheral device having a paging mechanism and an application operating in a virtual machine which includes a page directory for exclusive use by the paging mechanism of the peripheral device. The virtual machine is running on a data processing system and preferably contains a block of memory which is divided into various sections of memory. The page directory is provided to the paging mechanism of the peripheral device when the application requires the use of the peripheral device. A section of memory is selectively locked down in response to the section of memory being utilized by the application. Additionally, the page directory is updated with an entry which identifies the section of memory that is locked down. Memory may also be locked down in order to permit the peripheral device to access that section of memory. The page directory is selectively updated thereafter by mapping entries into the page directory in order to track memory usage within the block of memory utilized by the virtual machine. The page directory is preferably created at the same time the virtual machine is created. Memory for utilization by the virtual machine is preferably locked down while the virtual machine is in the foreground. When the virtual machine is terminated or moved into the background, the sections of memory that have been locked down are then unlocked or freed for other use.

System for locking down part of portion of memory and updating page

A method and apparatus for the enhancing efficiency of a data processing system which includes a host microprocessor, a system memory, and a graphics adapter for producing an enhanced graphics display. The graphics adapter is coupled to the data processing system by a bus and includes a video memory and an adapter microprocessor, wherein the adapter microprocessor is less powerful than the host microprocessor in the data processing system. The method and apparatus of the present invention includes the establishment of a stage buffer from a portion of the system memory with the stage buffer, including at least two buffer sections. A first portion of data is transferred from the system memory into a first buffer section. Next, a second portion of data is transferred from the system memory into a second buffer section, while the adapter microprocessor is simultaneously retrieving the first portion of data from the first buffer section and transferring that first portion of data across the bus to the video memory, wherein host microprocessor is available to perform other tasks. When the adapter microprocessor has transferred the data to the video memory from the first buffer section, the host microprocessor fills the first buffer section with more data, while the adapter microprocessor retrieves data from the second buffer section. This process continues until all the data has been transferred.

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Boca Raton, FL, United States of America

David Michael Hyde