Analog Devices,inc.

Analog Devices Global

David MacDonald Hossack

Robert W Adams

Benjamin Vigoda

Eric G Nestler

Jeffrey G Bernstein

Eric C Gaalaas

Kartik Nanda

Timothy J Caputo

Andrew Schweitzer

Mira Wilczek

William Peet

David Lamb

Kendrick Owen Daniel Franzen

Rama Thakar

Rishi Chaturvedi

Joseph Burke

In an aspect, in general, a programmable computation device performs computations of an inference task specified by a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. The device includes one or more processing elements. Each processing element includes a first storage for a definition of a factor, a second storage for data associated with the inputs and/or outputs of at least some of the computations, and one or more computation units coupled to the first storage and the second storage for performing a succession of parts of the at least some of the computations that are associated with a factor, the succession of parts defined by data in the storage for the definition of the factor.

Programmable probability processing

Microphone stages in a microphone array may be coupled together in a daisy chain. Each stage may include a microphone, an analog to digital converter, a decimation unit, a receiver, an adder, and a transmitter. The converter may convert analog audio microphone signals into digital codes that may be decimated. The adder may add decimated digital codes in each stage to a cumulative sum of decimated digital codes from prior stages. This new sum may be transmitted to the next microphone stage, where the adder may add the decimated digital codes from that stage to the cumulative sum. A serial interface may be used to connect the transmitters and receivers of each of the stages. The serial interface may be used to transmit the cumulative sum of decimated digital codes between the stages. The serial interface may also be used to transmit configuration data between the stages.

Microphone array with daisy-chain summation

A semiconductor circuit comprises a digital circuit portion, which in turn comprises a combinatorial logic block. The semiconductor circuit comprises a scan chain for loading and applying a predefined digital test pattern to inputs of the combinatorial logic block. A bi-directional communication port is adapted for writing incoming data to an address space of the digital circuit portion such as register addresses and/or memory addresses. Scan control hardware comprises a plurality of individually addressable scan control registers which are mapped to the address space of the bi-directional communication port. A method of testing the digital circuit portion through the scan chain involves writing bit values to inputs of the individually addressable scan control registers and reading bit values from at least one output of an individually addressable scan control register.

Semiconductor circuit and methodology for in-system scan testing

Programmable-gain amplifier systems are provided that are particularly suited for reducing degrading audio effects such as zipper noise. In one embodiment, these systems switchably couple an electronic potentiometer between an amplifier's inverting input terminal and interleaved tap points along a resistor that is coupled to the amplifier's output terminal. This arrangement introduces a number of fine gain steps between the gain steps that are realized with adjacent ones of the interleaved tap points to substantially reduce or eliminate zipper noise in a audio system that processes the system's output signal. The interleaved tap points facilitate efficient operation of the potentiometer during gain changes. They also permit the potentiometer to be effectively bypassed between gain changes so that distortion effects are substantially eliminated.

Programmable-gain amplifier systems to facilitate low-noise, low-distortion volume control

A sigma delta modulator includes a modulator module that includes a quantizer with variable hysteresis, which receives an input signal to perform necessary modulation operations. A non-linear mapping module receives a signal associated with said input signal and tabulates the necessary hysteresis control information so as to reduce the transition rate of the modulator module.

Sigma-delta modulator with reduced switching rate for use in class-D amplification

A noise-shaper system includes a scrambler coupled to receive the output of a randomizer. The randomizer has an input for receiving a plurality of parallel equally weighted bits in a first sequence, and a first output which provides said bits in a pseudorandom sequence with a transformation that is not dependant on said first sequence. The scrambler is coupled to receive the randomizer's output and, in response, to produce a second non-pseudorandom sequence of the bits at a second output with a transformation that is dependent on the pseudorandom sequence. The resultant output is noise shaped to reduce distortion.

Noise-shaper system and method

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Cambridge, MA, United States of America

David MacDonald Hossack