Cirrus Logic Inc.

Silicon Laboratories Inc.

Crystal Semiconductor Corporation

David M Pietruszynski

Axel Thomsen

Bruce Philip Del Signore

Ligang Zhang

Rex T Baird

Akhil K Garlapati

Derrick Chunkai Wei

Kevin G Smith

William G Bliss

Jerrell P Hein

Ion Constantin Tesu

German S Feyh

Douglas R Frey

James Dub Austin

Wesley Ladd Mokry

Brian G Kirkland

Yanning Lu

Matthew M Kostelnik

Ying Shi

Steven P Proffitt

An improved electromagnetic shielding structure has been discovered. In one embodiment of the invention, an apparatus includes an inductor and an electrically conductive enclosure that electromagnetically shields the inductor. The electrically conductive enclosure has an aperture at least as large as the inductor. The aperture is substantially centered around a projected surface of the inductor. The apparatus may include one or more electrically conductive links extending across the aperture and electrically coupled to the electrically conductive enclosure. The electrically conductive links reduce an effect of electromagnetic signals external to the electrically conductive enclosure on the inductor.

Electromagnetic shielding structure

A voltage reference generator has been discovered that generates a stable reference voltage that is less than the bandgap voltage of silicon for power supply voltages less than 2V, yet provides sufficient voltage headroom to operate a cascaded current mirror. In one embodiment, the voltage reference generator has a power supply rejection ratio of at least 60 dB and has improved noise performance as compared to traditional bandgap circuits. These advantages are achieved by leveraging the low-beta effect of a CMOS bipolar transistor to generate a current proportional to an absolute temperature.

Voltage reference generator circuit using low-beta effect of a CMOS bipolar transistor

A technique implements high impedance nodes using high threshold voltage devices that may generate less leakage current and may have a higher gate oxide breakdown voltage than standard devices in a particular manufacturing technology. Under at least one operating condition, for a particular power supply voltage, a circuit may be unable to produce a control signal that is sufficient to turn on such a high threshold voltage device. The technique adjusts the control signal voltage to provide a gate-to-source voltage sufficient to turn on the high threshold voltage device. At another power supply voltage, when the circuit is able to produce a control signal sufficient to turn on the high threshold voltage device, the technique does not adjust the control signal.

Utilization of device types having different threshold voltages

A voltage reference generator generates a stable reference voltage that is less than the bandgap voltage of silicon for power supply voltages less than 2V, yet provides sufficient voltage headroom to operate a current mirror. In one embodiment, the voltage reference generator has a power supply rejection ratio of at least 60 dB and has comparable noise performance as compared to traditional bandgap cirucits. These advantages are achieved by subtracting a current proportional to a complement of an absolute temperature from a current proportional to the absolute temperature to generate a voltage having a positive temperature coefficient, which is then added to a voltage that is a complement of the absolute temperature to achieve a voltage that has a low temperature coefficient.

Voltage reference generator circuit subtracting CTAT current from PTAT current

An electromagnetically-shielded high-Q inductor may be fabricated within a multi-layer package substrate (MLS). The inductor is preferably constructed as a loop structure on a layer of the MLS, and a shielding structure is formed around the inductor to substantially enclose the inductor in a Faraday cage-like enclosure. The shielding structure includes a top plate formed above the inductor on another layer of the MLS, and a bottom plate formed on yet another layer of the MLS or on a layer of an integrated circuit die which is below and attached to the MLS, preferably using solder bumps. Shielding structure sidewalls may be formed by a ring of stacked vias or via channels. The inductor is preferably connected to stacked vias which provide a connection to the underlying integrated circuit die by way of additional solder bumps and cut-outs through the bottom plate of the shielding structure.

Integrated circuit package configuration incorporating shielded circuit element structure

An optical disk pickup system includes an array of photodiodesfor converting photons reflected from an optical disk into a plurality of electrical signals each representing a channel. Driving circuitrydrives at least one of the electrical signals as a current across a conductor of a flexible cableA low impedance loadconverts the electrical signal driven across the conductor as a current into a voltage for further processing.

Optical disk pickup using current mode signal exchanges and systems and methods using the same

A method of tuning a DCXO includes the step of providing a coarse tuning array and a fine tuning array of capacitors fabricated on the same integrated circuit die. The coarse array is adjusted until the difference between a desired frequency and the output frequency corresponds to a change in capacitance no greater than half the range of the fine tuning array. In one embodiment, the fine tuning array is adjusted to mid-range before adjusting the coarse tuning array. A DCXO apparatus includes at least one integrated circuit segmented switched capacitor network providing a capacitance that is a nonmonotonic function of a composite input code. The segmented switched capacitor network includes parallel coupled binary weighted and thermometer coded switched capacitor networks for coarse and fine tuning, respectively.

Digitally controlled crystal oscillator with integrated coarse and fine control

An optical disk pickup system includes an array of photodiodes for converting photons reflected from an optical disk into a plurality of electrical signals each representing a channel. Driving circuitry drives at least one of the electrical signals as a current across a conductor of a flexible cable . A low impedance load converts the electrical signal driven across the conductor as a current into a voltage for further processing.

An interface for interfacing an optical pickup is associated with processing circuitry . A plurality of inputs receive data retrieved from an optical disk by the pickup and are each coupled to a corresponding one of the inputs and independently activated and deactivated to selectively pass the data to the processing circuitry.

Flexible interface signal for use in an optical disk system and systems and methods using the same

A system and method for an amplifier control circuit is provided which does not require the use of a large off-chip or on-chip capacitor for achieving a low frequency coupling corner, while still effectively allowing AC coupling the data detection circuit. In addition, the input offset voltage to the amplifier may be compensated and the inherent random low frequency input voltages provided to the amplifier may be controlled or canceled. Further, the amplifier control circuitry includes a freeze capability which allows the control circuitry to halt all updates to the input offset/low frequency control circuit when the voltage input signal is interrupted. In addition low frequency control and offset compensation updates may be performed without causing large output signal glitches so that the integrity of the received signal will not be compromised. In a preferred embodiment the system and method may be utilized for data detection circuits utilized in conjunction with optical disks.

System and method for control of low frequency input levels to an

A system and method for a data detection circuit is provided in which separate coarse gain amplifiers and fine gain amplifiers are utilized. The coarse gain amplifiers may include drain switching of transistors in order to modify the amplifier gain. More particularly, drain switching may be utilized to selectively switch in and out different differential input transistor pairs and/or different current sources. In this manner the gain of the amplifier may be adjusted to one of a variety of different coarse gain control levels. The coarse gain control provided allows for gain adjustments without significantly decreasing the bandwidth of the amplifier. In a preferred embodiment the system and method may be utilized for data detection circuits utilized in conjunction with optical disks.

System and method for coarse gain control of wide band amplifiers

A system and method for regulating the voltage at an input node of a varying current demand circuit is provided. The input node may be a power supply node and the varying current demand circuit may be a controllable oscillator. In addition, a frequency synthesizer may be formed from a phase locked loop which includes the controllable oscillator and a voltage control circuit. The voltage control circuit may receive an input control signal that varies as the current demand of the controllable oscillator varies. In response to the input control signal, the voltage control circuit may provide a more stable voltage supply to the controllable oscillator even as the current demands of the oscillator vary widely. The input control signal may be generated by generating a signal from the loop path of the phase locked loop. The frequency synthesizer may be utilized in a data storage system data detection circuit, such as for example, a data detection circuit used for recovering data from an optical disk.

System and method for improving the regulation of a supply voltage for a

An output driver is provided for operating in a primary power supply environment to drive an output system that can have voltages associated therewith that are higher than the primary power supply level. The driver includes a pull-down N-channel (34) and a pull-up P-channel transistor (44). An output node (40) is driven by the transistor (34) and (44). An N-channel protection device (38) is disposed between node (40) and transistor (34) and an N-channel transistor (48) is disposed between node (40) and transistor (44). Transistor (38) has the gate thereof biased to the primary supply voltage level and the transistor (48) has the gate thereof biased to a voltage slightly above the primary supply voltage level. This configuration allows a common control signal varying up to the primary power supply level utilized to drive both transistors (34) and (44) and also to remove the requirement that any of the wells associated with the driver transistors be biased to a voltage above the primary supply voltage level, to prevent current being conducted to the primary supply from the output node during a high voltage condition or for the voltage of any of the transistors to exceed a voltage slightly above that of the primary voltage supply level.

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Austin, TX, United States of America

David M Pietruszynski