University of Texas System

David M Mielke

G Jack Lipovski

Less-expensive, faster graphics display can be achieved by an in-parallel scan-line rendering system using a content-searchable memory based on a modified DRAM requiring periodic refresh that includes logical operation circuitry within the refresh circuitry. Data at individual storage locations of the DRAM are periodically read by a refresh amplifier, then a logical operation is performed on the refresh data before application to the write amplifier, allowing searching by data compare and mathematical operations. The data words of the content-searchable memory are loaded with data defining the multi-axis location of each of the vertices of a polygonal facet of an object in the scene and display information concerning the facet, such as color or texture. Data representing out-of-view objects can be culled, and the remaining objects projected onto a viewport, all through in-parallel manipulations in the content-searchable memory. For each span along the scan line, a span processor selects the facet closest to the viewport, and data from the selected facet is applied to an electronic display.

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Austin, TX, United States of America

David M Mielke