Raynet Corporation

Other

Sun Microsystems, Inc.

David M Arstein

William L Geller

Mark S Thomas

Clifford B Willis

Michael White

Vince P Hileman

Thomas E Giles

Victor E Jochiong

Raymond Kai Ho

Denise R Silverman

Timothy E Mautz

Richard R Creason

Kaamel M Kermaani

William F Ellersick

Carl L Meert

Adiymar Bigio

Thomas E Gles

Steve M Wilson

A computer system comprising a chassis and housing removable servers supported in subchassis, each chassis having optional front or read cable access. Power and signal connectivity to the servers may be made from the front or rear of the system. The subchassis may be half the width of the chassis or a quarter of a width of the chassis. The subchassis further include an upper bay and a lower bay as well as a plurality of field replaceable units, which all may be access through the front of the chassis. One or more of the field replaceable units connect to the system through a midplane, located within the subchassis.

Computer system having front and rear cable access

A dc-coupled receiver for a shared optical system includes an input feedback amplifier circuit which establishes a dc reference baseline voltage level for incoming packets of data. A pair of sample-and-hold circuits are connected in parallel to receive and sample signals from the feedback amplifier circuit when no data is being transmitted and at the initial edge of incoming packets of data. A voltage divider circuit receiving signals from the sample-and-hold circuits establishes a dc slicing level for each incoming packet of data. An output feedback circuit can be added to compensate for offset error without affecting the performance of the sample-and-hold circuitry.

DC-coupled receiver for shared optical system

A protocol for fiber-optic communication systems, or other communication systems based on transmission of unipolar pulses having wide dynamic range provides for information to be transmitted in packets having a predictable time slot for each transmitter. The receiver for such protocol has a first relatively long RC time constant mode conditioned for reception of data packets whose time of arrival is well predictable and a second relatively short RC time constant mode conditioned for reception of asynchronous randomly received packets. In the relatively long RC time constant mode, each packet includes a preamble having a first clamp interval in which no pulse is transmitted, and a second clamp interval in which a continual pulse is transmitted. A transducer on the receiver translates the packets of pulses into differential electronic signals on first and second outputs. First and second coupling capacitors, receive respective outputs of the transducer and AC couples the signals to respective second terminals of the capacitors. First and second switches connect the second terminals of the respective coupling capacitors to ground during the first and second clamping intervals, respectively, of the preamble. By clamping the outputs of the transducer to ground during the first and second clamping intervals, a DC level for each incoming packet is instantly established independent of the magnitude of the incoming packet. In the asynchronous mode, relatively low impedance discharge paths are established to reduce the time constant of the receiver. An output circuit, connected to the second terminal of each of the first and second coupling capacitors, supplies sequences of digital output signals in response to the differential signals.

Multi-RC time constant receiver

Transmission protocol for clamping receiver

Growing community of inventors

Scotts Valley, CA, United States of America

David M Arstein