Texas Instruments Corporation

David Louis Freeman

Marco Corsi

Dan Russell Poole

Evgenij Barsoukov

Sriram Narayanan

Tobin D Hagan

John Landau

Wallace Edward Matthews

Jose Antonio Vieira Formenti

Gene L Armstrong, Ii

William F Davies, Jr

A sensor power management arrangement includes a signal processing circuit configured to receive signal from a sensor, to test the signal against at least one criterion, and to pass the signal for further processing in response to the signal passing the at least one criterion. In this way, only signals that are of a sufficient importance or significance will consume the maximum amount of processing energy and through processing by later processes or circuitry. Should a signal from a sensor not be strong enough or meet other criteria, power will not be wasted in preparing that signal for provision to the microcontroller or microprocessor. Additional flexibility in the sensor power management can be realized by adjusting the criteria against which the sensor signal is compared based on a status of the sensor apparatus.

Sensor power management

A method for controlling a light emitting diode (LED) is provided. Initially, the LED, which had been active, is deactivated, and a voltage for a current that corresponds to the persistence of the LED is generated. The voltage is then integrated so as to generate an integrated voltage, and the integrated voltage is compared to a threshold. When the integrated voltage is less than the threshold, the LED is then activated.

Method and apparatus to measure light intensity

A tunable depletion diode is provided. Within this depletion diode, there is a depletion mode transistor that is coupled to the anode terminal at its gate and the cathode terminal at its drain. A diode is coupled between the source of the depletion mode transistor and the anode terminal, and a variable capacitor is coupled between the source of the depletion mode transistor and the anode terminal, where the capacitance of the variable capacitor is controls the reverse recovery time of the tunable depletion diode.

Diode for use in a switched mode power supply

The remaining run-time (t_rem) of a battery is determined independently of the condition of the battery and the amount of load on the battery by obtaining the value of a present total zero-current capacity (Qmax) of the battery based on relaxed-battery OCV values measured just before and just after a charging or discharging cycle. A current through the battery is integrated to determine a transfer of charge (Q) from the battery, and a value of total run-time (t_total) that would be required to reduce the open circuit voltage of the battery to a predetermined lower limit (Vmin) is determined. The remaining run-time (t_rem) is determined by subtracting the duration of the integrating from the total run-time (t_total).

Circuit and method for measurement of battery capacity fade

An internal impedance of a battery ( ) is automatically determined by operating a processor ( ) to analyze current flowing through the battery to determine if a transient condition due to change of current is occurring and determining when the transient condition has ended. A voltage of the battery is measured while a steady current is being supplied by the battery. The present depth of discharge (DOD) of the battery is determined and a database is accessed to determine a corresponding value of open circuit voltage. The internal impedance is computed by dividing the difference between the measured voltage of the battery and the open circuit voltage at the present DOD by an average value of the steady current. A remaining run-time of the battery can be determined using a total zero-current capacity of the battery, integrating the current to determine a net transfer of charge from the battery, determining a value of total run-time that would be required to reduce the voltage of the battery to a predetermined lower limit, determining the duration of the integrating, and determining the remaining run-time by subtracting the duration of the integrating from the total run-time.

Circuit and method for determining battery impedance increase with aging

A processor ( ) operates to determine amount of charge presently stored in a battery by determining that the battery is in a zero-current relaxed condition. Circuitry ( ) including a first ADC ( ) measures an open circuit voltage (OCV) of the battery prior to a period of time during which flow of current through the battery is not negligible. A program executed by the processor correlates the measured open circuit voltage (OCV ) with a corresponding value of the variable and selects the corresponding value as a value of the variable.

Circuit and method for monitoring battery state of charge

A capacity gauge is provided that measures a selected battery capacity of a plurality of batteries in a multiple battery system. A capacity gauge and a battery current sense resistor reside on the end equipment, while the battery pack contains minimal information associated with the battery pack. Control circuits provide for proper pack selection and pack connection timing, as well as capacity gauge synchronization. Power up/down circuits provide power to control logic, the selection circuits and capacity gauge at power up, power down and battery pack removal. The system is powered by a selected battery pack after the battery pack selection is executed, and the selected battery pack monitored by the capacity gauge.

Control circuit for multiple battery systems with capacity gauge on end equipment

A battery detect circuit ( ) is provided that is operable to dispose a sense resistor ( ) in series with the battery to determine whether the charge is being provided to the battery or being extracted from the battery. The voltage across the sensor resistor ( ) is sensed by a voltage/frequency converter ( ). The voltage/frequency converter ( ) is a differential structure comprised of two integrator structures ( ) and ( ) that are operable to utilize a switched capacitor configuration to drive comparators on the output thereof. Each of the integrator structures ( ) and ( ) has associated therewith passive elements and active elements. The integrators ( ) and ( ) have associated therewith integration capacitors ( ) and ( ). Additionally, there are two operational amplifiers ( ) and ( ) that provide the active components of each of the integrators ( ) and ( ). The various switched capacitor circuits ( ) and ( ) associated with the amplifiers ( ) and ( ) are provided to provide the integration operation. Both the amplifiers ( ) and ( ) and their associated switched capacitor circuits ( ) and ( ) are dynamically balanced such that they are switched between integrator ( ) and integrator ( ) on a periodic basis. This therefore allows the errors between the active and passive elements to be switched between the two integrators ( ) and ( ) such that no accumulative error occurs.

Battery pack with monitoring function utilizing association with a battery charging system

A battery monitoring/control device includes a monitor/control device ( ) that is operable to be integrated with a microprocessor system. The system includes a CPU ( ) that interfaces with a data bus ( ) and an address bus ( ). The CPU ( ) interfaces through a data line ( ) with the control/monitor device ( ) and control lines ( ) and ( ). Commands and data can be input to the control/monitor circuit ( ) and data received therefrom. The control/monitor device ( ) includes a controller/data register block ( ) and a battery charge control/monitor block ( ). The device ( ) is operable to monitor the battery voltage of a secondary battery ( ) during charging thereof and to control the rate of charge through a transistor ( ). The battery monitor ( ) determines when the voltage on the battery ( ) reaches a predetermined level indicating full-charge. A discharge circuit ( ) controls a discharge transistor ( ) to discharge the battery ( ) through a sense resistor ( ) for conditioning of the battery. The system receives current from the battery ( ) through the resistor ( ), the current monitored by a Gas Gauge monitor ( ). The Gas Gauge monitor ( ) maintains a measurement of the capacity of the battery ( ). Control and status information is maintained in control/status register ( ), which are set to a default value in a default register ( ) upon power up. The CPU ( ) can store control information in the registers ( ) in order to control the device ( ). Further, status information of the device ( ) can be stored in the register ( ) for access by the CPU ( ) through a bus interface ( ).

System for charging monitoring batteries for a microprocessor based method

A battery charging system is provided which is comprised of a battery pack ( ) and a charging system ( ). The battery pack ( ) includes a battery ( ) and a battery capacity detect circuit ( ). The battery capacity detect circuit ( ) having a memory is interfaced with the charging system ( ) through a communication link to output a CHG-Bar signal. The battery capacity detect circuit ( ) is operable to perform numerous monitoring operations on the battery by detecting the charge input to the battery and detecting charge taken away from the battery in a discharge operation. This operation is performed independent of the charging operation by the charging system ( ). However, the charging operation of the charger ( ) can be affected with the CHG-Bar signal.

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McKinney, TX, United States of America

David Louis Freeman