International Business Machines Corporation

David Lee Randall

David R Willoughby

Van Hoa Lee

George John Dawkins

Chetan Mehta

Mark Elliott Hack

Gordon David McIntosh

George Henry Ahrens, Jr

Kanisha Patel

Milton Devon Miller, Ii

Ashwini Kulkarni

Kiet Anh Tran

Bradley Ryan Harrington

Richard Alan Dayan

Richard Louis Arndt

Alongkorn Kitamorn

Michael Anthony Perez

Dennis L Moeller

Shaival Jagdishbhai Chokshi

John W Blackledge, Jr

Palmer E Newman

Michael Youhour Lim

Maulin Ishwarbhai Patel

Jayeshkumar M Patel

Thi Ngoc Tran

John C Kennel

Tam D Bui

Matthew T Mittelstedt

Grant L Clarke, Jr

Scott Douglas Walton

JoAnna B Yoder

Kimthanh D Le

Jeffrey Scott Mayes

Thomas Francis Ploski

Patrick E McCourt

Daniel John Ribbentrop, Sr

Manesh Patel

EEH methods are used during the boot process to actively disable a defective PCI adapter, thereby allowing the system boot to continue without disruption. This allows faulty adapters to be present in the machine without interrupting the boot process. The slots appear to be empty and the devices/adapters residing therein can be actively 'hot swapped' out without altering the rest of the machine state.

Initializing a processing system to ensure fail-safe boot when faulty PCI adapters are present

A system, method, and computer program product are disclosed for executing a reliable warm reboot of one of multiple partitions included in a logically partitioned data processing system. The data processing system includes partition hardware. A request to reboot a particular partition is received within the partition where the particular partition includes multiple processors. Prior to executing the reboot request, the partition hardware is set to a predetermined state. The reboot request is then executed within the particular partition. The predetermined state is preferably achieved by resetting the partition hardware to a predetermined state.

System and method for selectively executing a reboot request after a reset to power on state for a particular partition in a logically partitioned system

A method, apparatus, and computer instructions for recovering terminated partitions in a logical partitioned data processing system. A termination of a partition in a set of partitions associated with a host bridge in the logical partitioned data processing system is detected. The state of other partitions within the set of partitions is checked in response to detecting the termination. A recovery process is initiated if all partitions in the set of partitions have terminated. Input/output slots associated with the host bridge are reset to a normal state if the recovery process is successful. The set of partitions is rebooted after resetting the input/output slots associated with the host bridge without rebooting the logical partitioned data processing system.

Method and apparatus for recovery of partitions in a logical partitioned data processing system

A system and method for monitoring a host computer using a service processor is provided. A shared nonvolatile random access memory (NVRAM) area is used to store progress information from the host computer system. The host computer system writes progress information corresponding to the initialization step being performed to the shared NVRAM and also updates a host pointer in the NVRAM. The service processor reads the shared NVRAM and compares its pointer with the host pointer to determine whether new host initialization activity has been reported. The service processor sets a timer so that if host activity is not reported during a set amount of time an error condition occurs causing the service processor to handle the host computer error. An optional service processor routine determines whether the host computer is stuck in an initialization loop whereupon the service processor once again handles the host computer error.

System and method for system surveillance using firmware progress code

A system for managing input/output drawers within a data processing system. A unique identifier is assigned to each of a plurality of drawers, and is used by the operating system to identify the drawers in the system regardless of how these drawers are interconnected. Another unique PCI-bridge identifier is assigned to each of a plurality of PCI Host bridges (PHBs) from all drawers, and is used by the operating system to perform input/output processes to devices associated with the plurality of PHBs such that the ODM object for each of the PHBs remains the same regardless of how the drawer is interconnected in the system. When a new drawer is added to the system, a new unique identifier is assigned to the new drawer ensuring that the unique identifiers previously assigned to the other drawers are not used to identify the new drawer.

Permanent open firmware PCI host bridge (PHB) unit addressing to support dynamic memory mapping and swapping of I/O drawers

A method, apparatus, and computer instructions for halting input/output error propagation in the logically partitioned data processing system. All components associated with the bridge are identified to form a set of failed components in response to detecting an error state in a bridge within a set of bridges in the logical partitioned data processing system. An identification of the failed components is stored in which the identification is used by each partition during a boot process.

Method and apparatus for preventing the propagation of input/output errors in a logical partitioned data processing system

A system, method, and computer program product are disclosed for preventing machine crashes due to hard errors in one of multiple, different processors that are included in a logically partitioned data processing system. An error occurring in one of the processors is detected. A determination is then made regarding whether the processor has been deconfigured. The partition is then rebooted only in response to a determination that the processor has been deconfigured and will not be included in the partition processor resources. Thus, only the configured processors are rebooted. The deconfigured processor is not rebooted.

System, method, and computer program product for preventing machine crashes due to hard errors in logically partitioned systems

A method, system, and computer program product for enforcing logical partitioning of input/output slots within a data processing system is provided. In one embodiment, the system includes a hypervisor and at least one DMA address checking component. The hypervisor receives non-direct-memory-access requests for access to input/output slots and prohibits devices within one logical partition from accessing the input/output slots assigned to a different logical partition. The DMA address checking component receives direct-memory-access requests and prohibits requests for addresses not within the same logical partition as the requesting device from being completed. Requests with addresses corresponding to the same logical partition as the requesting device are placed on the primary PCI bus by the DMA address checking component for delivery to the system memory.

Method and apparatus to implement logical partitioning of PCI I/O slots

A method for locating a defective component in a data processing system during system startup is disclosed. Each component within the data processing system is assigned a location code. Then, a progress code is associated with a location code and a function being loaded to, tested, or executed in a component. After supplying power to the data processing system, the components of the data processing system are initialized and tested to establish a configuration. During the initialization and testing, a location code of a component and a corresponding progress code are displayed on a display panel. In response to a system hang, a defective component can be identified utilizing the location code and the progress code displayed on the display panel.

Method and apparatus for locating and displaying a defective component in a data processing system during a system startup using location and progress codes associated with the component

A method, system and computer program are described for isolating bus errors detected during system start-up by utilizing a technique in which a shared mailbox associated with a service processor is provided for holding the address of an adapter in an I/O drawer. If an error is detected the server processor is notified. The server processor then retrieves the address from the mailbox, uses it to derive a location code which is then passed along with the error code to an appropriate error analysis routine. The start-up procedure is then shut down.

Method and system for error isolation during PCI bus configuration cycles

A method and apparatus to provide accurate and automated timing of firmware routines, such as initialization tasks at boot time, is provided. Since each task sends a progress indicator code to a display buffer when it starts to run, by saving processor time stamps at the time these codes change, it is possible to calculate and store the time duration for each routine. In the case of system initialization, these time durations can be an indication of problems if they are much longer than normal or an indication of excessive, inefficient, or ineffective processing that might be speed up in order to reduce the total boot time.

Method and apparatus for timing duration of initialization tasks during system initialization

A processor register is reserved by early firmware code to be employed for checkpoint logging or for storing diagnostic information at the time of failure before a checkpoint display device, usually contained within an I/O subsystem, is initialized. Early firmware codes are usually written in assembly language and the firmware of the present invention dedicates a processor register for logging checkpoint information. If a machine fails before any checkpoint, or point of failure, is displayed by a checkpoint display device, a dedicated processor register has logged any checkpoint or diagnostic information. The error information relating to the failure is obtained from the dedicated register through JTAG (Joint Task Action Group) scanning utilizing a processor debugging tool.

Checkpoint logging without checkpoint display device availability

This invention relates to personal computer systems and, more particularly, to such a system having security features enabling control over access to data retained in such a system. In particular, a personal computer system in accordance with this invention has a normally closed enclosure, at least one erasable memory element for selective activation to active and inactive states and for receiving and storing a privileged access password when in the active state, an option switch operatively connected with the erasable memory element for setting the erasable memory element to the active and inactive states, a tamper detection switch operatively connected with the erasable memory element for detecting opening of the enclosure and for invalidating any privileged access password stored in the erasable memory element in response to any switching of the tamper switch, and a system processor operatively connected with the erasable memory element for controlling access to at least certain levels of data stored within the system by distinguishing between the active and inactive states of the memory element and between entry and non-entry of any stored privileged access password. In the presently preferred form of the invention, two non-volatile erasable memory elements are provided, one an EEPROM and the other battery backed CMOS RAM.

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Leander, TX, United States of America

David Lee Randall