International Business Machines Corporation

David Lawrence Pease

Roger John Gravrok

Todd Arthur Cannon

William James Csongradi, Jr

Ryan James Schlichting

Mark Kenneth Hoffmeyer

Benjamin A Fox

Mark Owen Maxson

James David Strom

James Francis Mikos

Patrick Evarist Sobotta

Roger Dale Emeigh

Ryan J Schliehting

Methods, systems, and computer program products are disclosed for acquiring test data from an electronic circuit by mounting a probe adjacent to a capture point on an electronic circuit board, capturing by the probe an electronic signal of the electronic circuit, digitizing by the probe the captured signal, and transmitting by the probe the digitized signal from the probe through a data communications connection to a remote device. Acquiring test data from an electronic circuit also includes storing by the probe the digitized signal in the probe. Acquiring test data from an electronic circuit may include processing by the probe the digitized signal. Acquiring test data from an electronic circuit also may include synchronizing acquisition of test data by the probe with acquisition of test data by one or more other probes.

Acquiring test data from an electronic circuit

A chip-to-chip digital transmission circuit includes a differential driver portion, a pair of differential signal transmission lines connected to the driver portion, and a receiver portion connected to the transmission lines, an output node of which reproduces a digital bit stream originally presented to a driver side input node, wherein the transmission lines carry both transmitted signal information and DC power for the receiver portion. The driver portion is configured to adjust both the transmitted signal magnitude and the DC power delivered to the receiver portion.

Chip-to-chip digital transmission circuit delivering power over signal lines

A method and structures are provided for implementing customizable dielectric printed circuit card traces. A void is defined near selected signal traces. The void is then filled with a dielectric material having a predefined dielectric property. The dielectric material is selected to alter at least one predefined electrical property of the selected signal traces, such as, coupling, propagation delay and attenuation. In one embodiment, an outer layer of a printed circuit card includes a plurality of signal traces and a mating circuit card layer including a plurality of matching signal traces is attached to the outer layer of the printed circuit card to create a cavity near selected signal traces. The cavity is filled with the selected dielectric material. In another embodiment, dielectric material is selectively removed near signal traces on an outer layer of the printed circuit card to define a void near selected signal traces.

Method and structures for implementing customizable dielectric printed circuit card traces

A method, apparatus and computer program product are provided for implementing automated detection of excess aggressor shape capacitance coupling in printed circuit board layouts. A PCB design file containing an electronic representation of a printed circuit board design is received. A list of candidate shapes is identified. The candidate shapes are disposed on layers adjacent to aggressor planes. A capacitance coupling the candidate shapes to adjacent aggressor planes is calculated. A ratio of the calculated capacitance and a decoupling capacitance connecting the candidate shapes to a reference plane is determined. The PCB design file containing an electronic representation of a printed circuit board design includes shape data and text data that are extracted to produce a list of shapes' names, areas, locations and planes; and includes data defining thickness and relative permittivity of the dielectric layers used for calculating the effective capacitance is an inter-layer parallel-plate effective capacitance.

Method, apparatus and computer program product for implementing automated detection excess aggressor shape capacitance coupling in printed circuit board layouts

A plurality of high speed differential output drivers are coupled to a reference current generator such that each output driver receives a substantially identical copy of a reference current signal for controlling one or more operational parameters (e.g., the propagation delay or skew) of the output driver. Multiple copies of the reference current signal are generated within the same region of an integrated circuit chip, thereby minimizing any process variations within the chip that might cause variances between the individual copies of the reference current signal. Each differential output driver has a differential pair of transistors that are coupled to ground or supply voltage through a common mode resistor that controls the common mode component of the driver output independent of the voltage swing of the output.

Growing community of inventors

Rochester, MN, United States of America

David Lawrence Pease