Sony Electronics Inc

Sony Corporation

Philips Electronics North America Corporation

Sony Corporation of America

Sony Corporation of Japan

Sony Corporation of Japan and Sony Electronics, Inc.

David L Rossmere

Robert Samuel Glenn, Jr

Robert W Duffy

William Blake Brown

William S Herz

Patrice J Capitant

John B Carlucci

O F Morgan

Michael Polatnick

Alfred Abraham Goldspiel

Aldo G Cugnini

Gary M Bennett

John Bryan Carluci

Dave Collier

A device for indicating the quality of a received digital broadcast video signal in a digital television receiver includes circuitry for determining the amount of multipath interference. The device generates a display graph indicative of the signal quality. Optionally, the device may also consider, in determining the signal quality, whether a demodulator in the television receiver is able to lock onto a sync sequence in the video signal, whether an adaptive equalizer also in the television receiver is able to lock onto the sync sequence, and the amount of errors being corrected in an error correction circuit in the television receiver.

Device for indicating the received signal quality in a digital television receiver

A random access audio/video processor having multiple outputs is disclosed. The processor includes a main control unit with analog video and audio back panels, an analog input/output board, audio and video processing boards, video effects board, synchronization board, and a system board (containing the main CPU). The video processing board includes a compressor for compressing input video signals, and triple transfer buffers for intermediate storage of digital video path. The video processing board further includes decompression circuits coupled to each of two triple transfer buffers for decompressing compressed stored video, and providing the decompressed video channels to an effects board for the addition of special effects. The audio processing board contains processors for compression, decompression, and effects, as well as triple transfer buffers. The triple transfer buffers include present, past, and future buffers which jointly operate to minimize discontinuities in the output channels. The invention provides an E to C mode to allow the user to preview video which has been compressed and decompressed to verify that no unwanted system artifacts exist, or are created by the compression process. This previewing is done in real-time while the material is being compressed and stored. A user may also bypass the compression circuit and capture uncompressed still frames directly in the triple transfer buffer, and store the uncompressed still frames, thereby permitting the independent display of still and motion video in each output channel.

Random access audio/video processor with compressed video resampling to

A dual bus, multi-function disk chassis is provided for use as an enclosure for hard disk drives that store audio or video. The chassis allows configuration of the disk drives for either one of two independent buses contained within the chassis without the need to re-cable any of the bus connections. These two buses are an audio bus for transmitting audio material and a video bus for transmitting video material. The chassis also contains multiple sets of edge connector pairs. Each of the edge connector pairs consists of a first edge connector for connection to the video bus and a second edge connector for connection to the audio bus. This arrangement allows the disk drives to be configured for audio or video storage depending on the orientation of the drive at insertion.

Multifunction disk chassis having audio/video buses for exclusively

A random access audio/video processor having multiple outputs is disclosed. The random access audio/video processor includes a main control unit having an analog video back panel, an analog audio back panel, an analog input/output (I/O) board. An audio processing board, a video processing board, a video effects board, a syncronization board, and a system board (containing the main CPU). The video processing board includes a compressor for compressing input video signals, and a triple transfer buffer, for intermediate storage of digital video path. The video processing board further includes decompression circuits coupled to each of two triple transfer buffers for decompressing compressed stored video, and providing the decompressed video channels to an effects board for the addition of special effects. The audio processing board contains four digital signal processors for audio compression, decompression, and effects processor. It also contains triple transfer buffers for intermediate storage of digital audio data. The system board contains the main CPU, DMA controllers and SCSI interfaces required to perform high speed audio-video data transfers to/from disk. The triple transfer buffers of the present invention include a present buffer, a past buffer and a future buffer, the purpose of which is to ensure that there is sufficient video and audio material in the present buffers to minimize any discontinuities in either the audio or the video channel outputs. The invention provides an E to C mode to allow the user to view video which has been compressed and decompressed to verify that no unwanted system artifacts exist or are being created by the compression process. The viewing of the compressed and decompressed material is done in real-time while the material is being compressed and stored. Under software control, a user may bypass the compression circuit and capture uncompressed still frames directly in the triple transfer buffer, and store the uncompressed still frames, thereby permitting the independent display of still and motion video in each respective output channel.

Random access audio/video processor with multiple outputs

A memory module, a partial address generator, and a controllable pseudo-random number generator are provided to a digital video system for generating values used to perform static/dynamic companding for transfer functions shifting/modifying digital video data. The memory module is used for storing an integrated collection of lookup tables comprising lookup tables having values used to perform linear/non-linear static and dynamic companding. The values used to perform static/dynamic companding are retrieved using composite addresses. During each access, the higher order bits are generated by the partial address generator, and the lower order bits are set to equal the current digital video data value being shifted/modified. The partial address generator generates the higher order bits of the composite address based on a number of companding scheme selection control signals and a pseudo-random number received as inputs. The controllable pseudo-random number generator generates the pseudo-random numbers based on the current value of a digital video control counter. Additionally, in the presently preferred embodiment, a quantization error detector is also provided to generate the dynamic companding scheme selection control signals when quantization errors are detected, thereby controlling and causing dynamic companding to be performed only when it is necessary.

Integrated linear/non-linear static and controllable dynamic companding

Under one embodiment, a first and a second similarly constituted detector, and an OR gate coupled to the two detectors, are provided to a digital video system. The first detector detects quantization errors of numerically adjacent values in vertically adjacent pixels of a current frame. The second detector detects quantization errors of numerically adjacent values in horizontally adjacent pixels in the current frame. The OR gate is used to determine whether quantization errors of numerically adjacent values are detected in at least one of the two spatial dimensions of pixel adjacency in the current frame. In one variation of this embodiment, a potential quantization error lookup table that supports concurrent lookups for vertically and numerically adjacent quantization error detection as well as horizontally and numerically adjacent quantization error detection is used and shared between the two detectors. In an expanded embodiment, a third similarly constituted detector is further provided, and coupled to the OR gate. The third detector detects quantization errors of numerically adjacent values in temporally adjacent pixels of successive frames. The OR gate is used to determine whether quantization errors of numerically adjacent values are detected in at least one of the three dimensions of pixel adjacency. In a further expanded embodiment, a compensation corrector is further provided, and coupled to the OR gate. The compensation corrector prevents successive shifting/modifying of digital video data of horizontally/vertically/temporally adjacent pixels to the same value otherwise resulting from dynamic companding.

Digital video data quantization error detection as applied to

A flexible computer controlled non-linear transform generator is disclosed which employs a random access memory (RAM) lookup table (LUT) having programmable controlled address and data paths and an address multiplexer which is programmed to dynamically control LUT loading and live data transformation. A MASK register is programmed to dynamically modify the number of banks of memory in the LUT, an ADDRESS SELECT register is programmed to set the access mode of for the LUT--either random access mode, auto-increment mode, or live data mode, a BIT WIDTH register is programmed to set the width of the data stored in the LUT, and a BASE ADDRESS register is programmed with the starting address for loading the LUT in auto-increment mode. During live data transformation, a digitized input signal is used to address the LUT, while the contents of the LUT at the addressed location provides a digitized output signal according to a predefined transfer function. During LUT loading, transform data for different transfer functions may be stored in different banks of the LUT. Thereafter during live data transformation, the transform generator's transfer function can be quickly changed by reprogramming the MASK register to switch LUT banks.

Flexible computer controlled non-linear transform generator

A hardware implementation of a digitized image corrector is disclosed that converts a colorimetric representation of an original image into a new representation based upon the colors of the original and target images, as well as user supplied artistic parameters. The digitized image corrector receives digitized Red, Green and Blue input signals that comprise a colorimetric representation of an original film scene, and generates digitized Red, Green, and Blue output signals according to the specifications of SMPTE 240 M. The digitized image corrector is comprised of four identical hardware correction modules, which are coupled to receive correction parameters from an external source. Each module has a bypass switch for entering a bypass mode, which is used for reconfiguration of the module's correction parameters without affecting the output image. Each correction module receives digitized input signals and generates digitized output signals by transforming the digitized input signals according to a set of predetermined correction parameters and a transfer function defined by a matrix of functions.

Hardware implementation of an HDTV color corrector

A method and apparatus for quickly adding at least three multi-bit binary numbers. The addition is divided into two stages. In Stage I, each of the addends are grouped into like-ordered multi-bit clusters and the corresponding clusters of the addends are added together using Programmable Read Only Memory (PROM) integrated circuits (ICs) yielding several intermediate sums. In Stage II, the intermediate sums are combined to yield a final sum using Programmable Array Logic (PAL, is a trademark of Monolithic Memories, Inc.) ICs. Furthermore, the final sum is rounded in Stage I (and clipped if necessary in a third stage) before being provided as output. Clipping is achieved by setting the output sum to zero if the final sum is negative and setting the output sum to a predetermined threshold value if the final sum exceeds the threshold value.

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San Jose, CA, United States of America

David L Rossmere