The 3do Company

Atari Corporation

Rose Communications, Inc.

Cagent Technologies, Inc.

Jovial Test Equipment, Inc.

David L Needle

Robert J Mical

Teju J Khubchandani

Stephen H Landrum

Whitney E Childs-Goodrich

Stan F Shepard

Gary Gin

Ronald P Wilder

Gregory Pierce

Richard C Frey

Craig Nelson

Donald M Gray

Bradley C Stribling

Javier Solis

David S Morse

A detector and a variable signal generator are coupled so that one or more specific changes in the output of the detector will cause a change in the characteristics of the generated signal. This change in signal characteristics is non-transient, the change remaining in effect until such time that another change in the detector output causes another change in the signal characteristic. The system can provide remote-end positive wire identification with no additional instrumentation at the remote end. When this invention is embodied in an already existing piece of test equipment, such as a multimeter or time domain reflectometer, there need be no additional hardware instrumentation at either end.

Method and apparatus for remotely changing signal characteristics of a signal generator

The invention provides a method and apparatus for enhancing apparent image resolution by way of multi-line interpolation. A method for enhancing the resolution of low-resolution image-data includes the steps of: providing a memory &lsqb;420&rsqb; having independently addressable storage banks &lsqb;420L,420R&rsqb;; storing the low-resolution image-data &lsqb;125&rsqb; in the memory &lsqb;420&rsqb; such that low-resolution image-data defining a first low-resolution row &lsqb;LR,&rsqb; resides in a first of said storage banks &lsqb;420R&rsqb; and such that low-resolution image-data defining a second low-resolution row &lsqb;LR,&rsqb;, adjacent to the first low-resolution row &lsqb;LR,&rsqb;, resides in a second of said storage banks &lsqb;420L&rsqb;; extracting first through Nth low-resolution pixel signals &lsqb;S,-S,&rsqb; from the memory &lsqb;420&rsqb;, said signals representing values of low-resolution pixels in the adjacent first and second low-resolution rows &lsqb;LR,,LR,&rsqb; of the low-resolution image-data &lsqb;125&rsqb;; and producing a high-resolution pixel signal &lsqb;Hpx&rsqb; from said first through Nth low-resolution pixel signals &lsqb;S,-S,&rsqb; in accordance with a distance-weighted algorithm.

Resolution enhancement for video display using multi-line interpolation

Method and apparatus for remotely changing signal characteristics of a

An apparatus and method for updating a color look up table and expanding video data for use in various applications such as a multimedia computer. The color look up table updating scheme permits selective updating of one entry in the table or up to all of the entries in the table. Updating of the color look up table is preferably performed during the horizontal blanking period. The table may be comprised of two buffers, and a combined output of these two buffers further enhances a multiplicity of colors available to a user.

Apparatus and method for updating a CLUT during horizontal blanking

A digital signal processing architecture is inherently cyclical in nature, by providing a timer which can be programmed to reset the processor and return to the first instruction periodically, typically once each sample of the input sample stream. Pipeline operation is enhanced through the use of a double buffering system in which operands are latched into the first stage of a double buffer as soon as they are ready, but they are transferred to the second stage only when the last-ready operand is available and the computation unit is ready to receive the operands. The computation unit receives the operands in the second stage of the buffers. The processor communicates with an external unit via a random access memory and a plurality of FIFOs. Each FIFO is associated with a respective location in the random access memory. Whenever the processor retrieves a value from one of these locations in the random access memory, control means automatically refills that location from the corresponding FIFO. Similarly, whenever the processor writes data to one of the locations corresponding to an output FIFO, control means automatically recognizes that and copies the data into the corresponding output FIFO. Output FIFO writes may be emulated by an address latch and a data latch in a path to the FIFOs. The processor also includes instructions with a 'write-back' bit, a novel register addressing mode, a 'branch from' instruction, an invisible move function, and an operand mask register.

Digital signal processor architecture

Linked lists of spryte control blocks are prepared in memory and traversed by a spryte rendering engine. Each spryte control block controls the rendering of a respective spryte into the display buffer, and contains such information as a pointer to source data for the corresponding spryte, positional and incrementing specifications for a destination quadrilateral, a control word for manipulations to be performed on the spryte image source data, and an indication of which of several available formats the spryte image source data is packed in. Once the linked list is prepared, the spryte rendering engine can be called by writing certain values into specific memory-mapped hardware registers, and then writing dummy data to an address recognized by the hardware as a command to initiate the spryte rendering operation.

Method for controlling a spryte rendering processor

The invention provides a method and apparatus for processing digital image data to produce realism-imparting effects such as shadowing, highlighting, color filtering, colored reflections rendering and the like. An image processing apparatus in accordance with the invention includes three independent processing units for processing the Red, Green and Blue components of a supplied set of image-defining signals. The apparatus provides either homogeneous intensity scaling for all three colors or intensity scaling on a color-by-color basis. Means are provided for changing the imparted effects in real time on a pixel-by-pixel basis. Means are provided for using one signal to control the effect imparted on a second signal.

Method and apparatus for processing image data

The invention provides a method and apparatus for managing color modification of a raster based image on a real time, line-by-line basis and for managing real-time of new imagery into buffers whose data is displayable.

Display list management mechanism for real-time control of by-the-line

The invention provides a method and apparatus for enhancing apparent image resolution by way of multi-line interpolation. A method for enhancing the resolution of low-resolution image-data includes the steps of: providing a memory having independently addressable storage banks; storing the low-resolution image-data in the memory such that low-resolution image-data defining a first low-resolution row resides in a first of said storage banks and such that low-resolution image-data defining a second low-resolution row, adjacent to the first low-resolution row, resides in a second of said storage banks; extracting first through Nth low-resolution pixel signals from the memory, said signals representing values of low-resolution pixels in the adjacent first and second low-resolution rows of the low-resolution image-data; and producing a high-resolution pixel signal from said first through Nth low-resolution pixel signals in accordance with a distance-weighted algorithm.

The telephone system of the present invention is realized by a unique dynamic time slice architecture which allows for up to 480 transfers of data. A dual port RAM is utilized in which are stored two pages of data, containing time slice information identifying the sending and receiving devices for each time slice slot within the frame. The time slice configuration can be easily modified to accommodate a change in the current system configuration, for example, a handset connecting or disconnecting from a central office line, or the initiation of a conference call. The time slice configuration is modified by updating the second page and swapping the two pages at the beginning of the next frame so that the time slice controller accesses the second page and the configurations specified therein. Thus the system can be updated and controlled in real time with no delays to the users of the telephone system. The telephone system of the present invention further provides a dynamic conferencing capability which can accommodate a large number of users with no additional circuitry and little additional system overhead. The conferencing circuit linearly combines digitized audio data received from different sources over successive time slice slots in a single frame on a real time basis wherein parties can be added or removed simply by adding or removing the connections to the time slice slots.

Digital radio telephone system

A raster graphics color palette architecture for multiple display objects or sprites includes a first memory for storing pen index information for each display object. The pen index information for each display object includes pen index information corresponding to each pixel of that display object. A second memory stores indexing information for each display object. The indexing information maps the pen index information for the corresponding display object to pen numbers. A pen palette device includes a number of dynamically alterable registers, or 'pens,' containing RGB information for driving a multicolor raster display. In operation, pen index information representing the pixels of a display object is accessed from the first memory. This pen index information is mapped into pen numbers using the indexing information for the display object stored in the second memory. These pen numbers are then coupled to the pen palette to provide the RGB information for driving a multicolor raster display. Indexing information in the second memory associated with a particular sprite can thus be changed without changing the pens in the pen palette allowing changes to the colors of an individual display object sprite without affecting the colors of other display object.

Raster graphics color palette architecture for multiple display objects

A system (60) for predicting CPU addresses includes a CPU (34) connected by bus (62) to page mode address predicting circuit (64). The page mode address predicting circuit (64) is connected to memory arbitration circuits (66) by bus (68). The memory arbitration circuits (66) are connected to RAM (42) by address, data and control busses (44), (46) and (48). The CPU (34), page mode address predicting circuit (64) and the memory arbitration circuits 66 are contained in a microprocessor integrated circuit (32). The page mode predicting circuit 64 examines signals from the CPU (34) to be supplied to the data bus (46) at the time of a SYNC pulse. This operation results in examination of the first byte of a CPU instruction to determine how many of the following memory accesses will be able to be carried out in high speed mode. If it is determined that the next memory access will be able to be carried out in the high speed mode, then the next memory cycle is performed using a high speed access mode of the RAM (42), e.g. page mode access.

System for dynamically providing predicted high/slow speed accessing

In the secure radio transmission system of the present invention the sign bit for each byte of audio digital data is scrambled to generate a scrambled sign bit. By altering the sign bit, the resultant sound is significantly affected regardless of the amplitude range of the source audio. A key is stored in each authorized radio transmitter/receiver telephone. The key is used to select the bits of the digital voice data to be transmitted which are used to scramble the sign bit. The selected bits of the voice data are then used to scramble the sign bit and the voice data with the scrambled sign bit are transmitted to the receiving device. The receiving device executes the reverse process wherein the receiving device selects predetermined bits of the received voice data according to the key stored in the receiving device and scrambles the scrambled sign bit using the same algorithm in accordance with the data bits selected. This process generates the unscrambled sign bit and unscrambled voice data is generated at the output of the receiving device.

Secure voice data transmission system

A method and circuit generate a dependent clock signal from a master clock signal with minimal skew of the dependent clock signal with respect to the master clock signal and inverting it to create a second master clock signal that is one hundred eighty degrees out of phase with the first master clock signal. The second master clock signal is used to drive a flip flop type circuit so that the flip flop circuit changes states when the first master clock signal is at a 'zero' level and the second master clock signal is at a 'one ' level. The output of the flip flop circuit is enabled using the first master clock signal. Connected to the output of the tri-state driver is a repeater circuit of the type having an output that remains the same as the input until the input level is changed. The resulting dependent clock signal has a minimal skew with respect to the first master clock signal because the output of the flip flop circuit has become stable by the time the tri-state driver is enabled by the first master clock signal. Thus, the skew line is limited to the delay time of the tri-state driver.

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Alameda, CA, United States of America

David L Needle