Adtran Gmbh

David L Mack

Clifford L Hall

Stacy M Murphree

John B Bartell

Jason F McCullough

David R Krueger

Michael W Elliott

To provide either or both multiplexed and non-multiplexed (loop repeater) mode communications in the same equipment shelf between a network and plural subscriber circuits, a multi-mode backplane architecture includes a network interface multiplexer that provides time division multiplexed signal connectivity and point-to-point multiplexed signal connectivity between the network and line circuit access modules, to which the subscriber circuits are selectively ported. Each of a plurality of non-multiplexed interface connectors is configured for external connection to non-multiplexed communication links of the network and non-multiplexed communication links of the subscriber circuits. A plurality of access module card slots receive line circuit access modules that are individually programmable to provide a selected one of a plurality of diverse modes of telecommunication connectivity between the network and a subscriber circuit. The line circuit access modules have input/output multiplexers that selectively provide connectivity between its signal processor line and signal paths of the network interface multiplexer, and signal paths of a plurality of point-to-point communication ports of non-multiplexed interface connectors.

Backplane architecture for providing both loop repeater and multiplexed mode connectivity in the same equipment shelf

The problem of digital data corruption heat occurs when an analog card is inserted into a card/time slot of a D4 channel bank is effectively remedied by sampling and analyzing the channel bank's transmit enable (TNEN) lead for successive frames of time slots. Unless analyzed TNEN lead samples of a channel unit time slot of interest derived over successive frames have the same logic state associated with an analog channel unit, the PCM data lead remains default-coupled to a digital data transmission lead. This prevents PCM-encoded spurious noise on the analog PAM lead from being erroneously asserted in place of serialized digital data bits that should have been passed directly from the digital data bus to the PCM bus.

Reduction of errors in D4 channel bank by multiframe comparison of

A D4 channel bank data bus monitoring scheme automatically determines if a channel unit connector slot is occupied, without having to gain physical access to the interior of the channel bank cabinet and inspect the channel bank's backplane slot positions. To this end, for a respective channel unit connector slot the channel bank's transmit data bus, which is initially pulled high via a pull-up resistor, is monitored for an all `1`s state. If the data on the bus is not all `1`s, then it is inferred that a channel unit is installed. If an all `1`s state is not detected, then, during the next time slot for that channel unit, the bus is decoupled from the pull-up resistor and coupled instead to a `soft` pull-down resistor. If the data on the bus is now all `0`s, it is inferred that the previously read all `1`s condition was due to the fact that no channel unit is installed, and the channel unit connector slot is declared as empty. However, if the data on the TDATA bus is not all `0`s, it is inferred that the previously read all `1`s condition was actual data asserted by an installed channel unit, and the channel unit connector slot is declared as occupied.

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Madison, AL, United States of America

David L Mack