Intel Corporation

Other

Micron Technology Incorporated

David L Kencke

Brian S Doyle

Charles C Kuo

Robert S Chau

Kaan Oguz

Ibrahim Ban

Mark L Doczy

Uygar E Avci

Peter L D Chang

Satyarth Suri

Roksana Golizadeh Mojarad

Uday Shah

Elijah V Karpov

Kevin O'Brien

Clair C Webb

Ravi Pillarisetty

Dmitri E Nikonov

Stephen M Cea

Prashant Majhi

Avci E Uygar

Jack T Kavalieros

Tyler A Lowrey

Abhishek A Sharma

Niloy Mukherjee

Patrick R Morrow

Suman Datta

Rishabh Mehandru

Aaron D Lilak

James W Tschanz

Yih Wang

Ilya V Karpov

Fatih Hamzaoglu

Martin D Giles

Daniel Xu

Arijit Raychowdhury

Semyon D Savransky

Yong Ju Lee

Kerryann M Foley

Roksana Golizadeh Mojard

A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is described. In one embodiment, a p type back gate with a thicker insulation is used with a thinner insulated n type front gate. Processing, which compensates for misalignment, which allows the different oxide and gate materials to be fabricated is described.

Floating body memory cell having gates favoring different conductivity type regions

Spin transfer torque memory (STTM) devices incorporating an Insulator-Metal-Transition (IMT) device or at least one layer of Insulator-Metal-Transition (IMT) material are disclosed. The Insulator-Metal-Transition (IMT) device or at least one layer of Insulator-Metal-Transition (IMT) material are utilized for providing a spike current when the voltage across it exceeds the threshold voltage to reduce a critical current required for transfer torque induced magnetization switching.

Spin transfer torque memory (STTM) devices with decreased critical current and computing device comprising the same

An embodiment includes an apparatus comprising: a substrate; a magnetic tunnel junction (MTJ), on the substrate, comprising a fixed layer, a free layer, and a dielectric layer between the fixed and free layers; and a first synthetic anti-ferromagnetic (SAF) layer, a second SAF layer, and an intermediate layer, which includes a non-magnetic metal, between the first and second SAF layers; wherein the first SAF layer includes a Heusler alloy. Other embodiments are described herein.

Low stray field magnetic memory

Techniques are disclosed for fabricating a self-aligned spin-transfer torque memory (STTM) device with a dot-contacted free magnetic layer. In some embodiments, the disclosed STTM device includes a first dielectric spacer covering sidewalls of an electrically conductive hardmask layer that is patterned to provide an electronic contact for the STTM's free magnetic layer. The hardmask contact can be narrower than the free magnetic layer. The first dielectric spacer can be utilized in patterning the STTM's fixed magnetic layer. In some embodiments, the STTM further includes an optional second dielectric spacer covering sidewalls of its free magnetic layer. The second dielectric spacer can be utilized in patterning the STTM's fixed magnetic layer and may serve, at least in part, to protect the sidewalls of the free magnetic layer from redepositing of etch byproducts during such patterning, thereby preventing electrical shorting between the fixed magnetic layer and the free magnetic layer.

Techniques for forming spin-transfer torque memory having a dot-contacted free magnetic layer

Techniques are disclosed for forming integrated circuit structures including a magnetic tunnel junction (MTJ), such as spin-transfer torque memory (STTM) devices, having magnetic contacts. The techniques include incorporating an additional magnetic layer (e.g., a layer that is similar or identical to that of the magnetic contact layer) such that the additional magnetic layer is coupled antiferromagnetically (or in a substantially antiparallel manner). The additional magnetic layer can help balance the magnetic field of the magnetic contact layer to limit parasitic fringing fields that would otherwise be caused by the magnetic contact layer. The additional magnetic layer may be antiferromagnetically coupled to the magnetic contact layer by, for example, including a nonmagnetic spacer layer between the two magnetic layers, thereby creating a synthetic antiferromagnet (SAF). The techniques can benefit, for example, magnetic contacts having magnetic directions that are substantially in-line or substantially in-plane with the layers of the MTJ stack.

Spin-transfer torque memory (STTM) devices having magnetic contacts

An embodiment includes an apparatus comprising: a substrate; and a perpendicular magnetic tunnel junction (pMTJ) comprising a fixed layer and first and second free layers; wherein (a) the first free layer includes Cobalt (Co), Iron (Fe), and Boron (B), and (b) the second free layer is epitaxial and includes Manganese (Mn) and Gallium (Ga). Other embodiments are described herein.

Perpendicular magnetic memory with reduced switching current

Techniques and mechanisms to provide insulation for a component of an integrated circuit device. In an embodiment, structures of a circuit component are formed in or on a first side of a semiconductor substrate, the structures including a first doped region, a second doped region and a third region between the first doped region and the second doped region. The substrate has formed therein an insulation structure, proximate to the circuit component structures, which is laterally constrained to extend only partially from a location under the circuit component toward an edge of the substrate. In another embodiment, a second side of the substrate&#x2014;opposite the first side&#x2014;is exposed by thinning to form the substrate from a wafer. Such thinning enables subsequent back side processing to form a recess in the second side, and to deposit the insulation structure in the recess.

Isolation structures for an integrated circuit element and method of making same

An embodiment includes an apparatus comprising: first and second electrodes on a substrate; a perpendicular magnetic tunnel junction (pMTJ), between the first and second electrodes, comprising a dielectric layer between a fixed layer and a free layer; and an additional dielectric layer directly contacting first and second metal layers; wherein (a) the first metal layer includes an active metal and the second metal includes an inert metal, and (b) the second metal layer directly contacts the free layer. Other embodiments are described herein.

Perpendicular magnetic memory with filament conduction path

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Beavertown, OR, United States of America

David L Kencke