Tektronix, Inc.

David L Kelly

Patrick A Smith

Que Thuy Tran

Daniel G Knierim

Shane A Hazzard

Jed H Andrews

Michael A Martin

Douglas A Blegen

Keith D Rule

John C Calvin

Kayla R Klingman

Michael M Heidling

John C Delacy

An apparatus and method that captures a complete history of serial network Link Training negotiations by continuously monitoring multiple analog signals representing both sides of full duplex lanes in real-time by pattern matching the Link Training Frame Marker and the subsequent negotiation request/response data values. The apparatus and method compare the digitized version of the incoming signal against a nominal pattern at the start to find the Frame Markers and Control Channel data, storing only those Control Channel data values that do not match the current compare pattern, and further by updating the current compare pattern to the new pattern just received, so that only the transitions in the data values are stored, thereby vastly reducing the amount of data presented to the user, but nonetheless retaining the complete substantive history of the Link Training negotiations.

Selective extraction of network link training information

A test and measurement instrument, such as an oscilloscope, including one or more ports to receive one or more signals from a device under test, a trigger enable logic circuit configured to output a trigger enabled signal when a trigger enable event occurs within the one or more signals, the trigger enable event being a real-time event of the one or more signals, one or more trigger logic circuits configured to generate a plurality of trigger signals when the trigger enable signal is received, each trigger signal being generated when a trigger event occurs within one of the one or more signals, and an acquisition circuit configured to acquire and store data in a memory in response to each of the trigger signals.

Enabling a trigger in a test and measurement instrument

A test and measurement instrument including an input port configured to receive an input signal. One or more divider circuits, coupled to the input port, employ a plurality of divide ratios such that each divide ratio scales an event signal indicating events in the input signal by a predetermined integer value. A control system is also included. The control system is configured to iteratively determine an estimated signal frequency of the event signal, and automatically select a divide ratio for the event signal based on the estimated signal frequency. The instrument may also include one or more counters to count triggers in the event signal subsequent to application of the divide ratio. The instrument may also employ frequency hysteresis to prevent chatter in divide ratio selection.

Automatic frequency prescaler

This disclosure relates generally to test and measurement instruments structured to detect that a series of events occurred, and structured to generate a trigger signal in response to detecting that a final event in the series of events occurred. The trigger may be generated based on a timeout signal, or based on another event, trigger, or signal. Stored data in the acquisition memory may be marked relative to the detection of the final event. An external forced timeout signal may control which in a series of events is marked as a final event. The triggering on final event may be enabled after another trigger is satisfied, and may be used as one of many different types of triggers.

Trigger on final occurrence

A test and measurement instrument, including an input configured to receive a signal-under-test, a user input configured to accept a first trigger event and a second trigger event from a user, a first trigger decoder configured to trigger on an occurrence of the first trigger event and generate a first trigger signal, a second trigger decoder configured to trigger on an occurrence of the second trigger event occurring after the first trigger event and generate a second trigger signal, and an acquisition system configured to acquire the signal-under-test in response to the first trigger signal and store the acquired signal-under-test based on whether the second trigger signal validates or invalidates the first trigger signal.

Test and measurement instrument having advanced triggering capability

A test and measurement apparatus, system, and method for synchronizing an acquisition or triggering system to a specific burst of interest. The subject apparatus and method triggers on varying energy content of a signal qualified by time in the presence of high-frequency input signal bursts, by using an adjustable pulse width envelope detector, disposed in the signal path of the trigger circuitry, as a digital rectifier or to otherwise process and extract an envelope signal. An RF envelope probe having an analog envelope detector among other suitable components is disclosed. A method is implemented for isolating an interval of interest in a signal under test. An envelope detector circuit produces an envelope signal from the signal. Trigger circuitry receives the envelope signal from the envelope detector, and isolates the interval of interesting in the signal under test using the envelope signal.

Apparatus and method for performing burst triggering in a test and measurement instrument

A test and measurement instrument includes an input terminal to receive a signal, acquisition circuitry to capture a plurality of triggered acquisitions, trigger circuitry to cause a trigger event responsive to trigger criteria, and a controller to dynamically reconfigure the trigger criteria between triggered acquisitions. The controller is configured to dynamically reconfigure the trigger criteria from the first set of trigger criteria to subsequent sets of trigger criteria between each of the triggered acquisitions. A method is disclosed for scanning information associated with an initial triggered acquisition and, depending on the nature of the scanned information, dynamically adjusting the next or any subsequent set of trigger criteria.

Dynamic oscilloscope triggering

A method for improving performance and flexibility of serial data analysis in test instruments, is independent of data bit rate, encoding scheme or communication protocol embodied in the serial data. The serial data is input to a transmitter section, where it is demultiplexed into a plurality of multi-bit lanes, such as n bits for each of N lanes. The N lanes are then encoded into characters, the encoded N lanes having m bits per lane where m&#x3e;n. Bit stuffing is used to adjust the data rate and/or to insert qualifiers. The stuffed, encoded N lanes are then multiplexed into N serial lanes, which are output from the transmitter section for input to a receiver section at a data rate that is optimal for the receiver section. In the receiver section the N lanes are deserialized, decoded and input to a word recognizer to generate a trigger event signal.

Serial data analysis improvement

A pattern sequence and state transition trigger generator provides a trigger when a specified transition from one pattern/state to another pattern/state occurs in a set of input signals. Decoders detect each specified pattern/state from the set of input signals to produce a prior value and a current value representing the transition. The prior value is slightly delayed and combined with the current value to produce an overlap when the specified transition occurs, which in turn generates the trigger.

Pattern sequence and state transition triggers

An advanced trigger circuit includes two trigger decoders, each triggering on one of respective pluralities of continuous-time trigger events. In one embodiment, a programmable timer begins timing in response to an output signal of the first trigger decoder and generates an end-of-time signal at the expiration of its time period. A reset circuit resets the first trigger decoder if the second selected continuous-time trigger event failed to occur before the end-of-time signal was generated. In another embodiment, a reset decoder generates a reset signal in response to an occurrence of a selected continuous-time trigger event. The reset circuit is responsive to the reset signal for resetting the first trigger decoder if the second selected continuous-time trigger event failed to occur before the reset signal was generated. In other embodiments, the advanced trigger circuit triggers on a serial lane skew violation or on a beacon width violation.

Oscilloscope having advanced triggering capability

A system includes a plurality of digital storage oscilloscopes (DSOs) in which each DSO requires a respective temporal portion of a signal under test (SUT) according to a synchronized triggering signal and respective post-trigger count periods such that a plurality of acquisition records may be concatenated to produce a longer acquisition record.

Method and apparatus providing concatenated data from multiple signal acquisition devices

A system comprising a plurality of digital storage oscilloscopes (DSOs) in which each DSO acquires a common signal under test (SUT) according to respective clock signals having common frequency parameters and respective phase parameters such that a plurality of acquisition records may be interleaved to produce a higher effective resolution acquisition record.

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Portland, OR, United States of America

David L Kelly