Asm IP Holding B.v.

Asm IP Holdings B.v.

David Kohen

John Tolle

Harald Benjamin Profijt

Joe Margetis

Andrew Kretzschmar

Jan Willem Maes

Qi Xie

Dieter Pierreux

Alexandros Demos

Amir Kajbafvala

Nupur Bhargava

Harald Profijt

BokHeon Kim

Xin Sun

Vijay D'Costa

A method for forming a forming a semiconductor structure is disclosed. The method may include: forming a silicon oxide layer on a surface of a substrate, depositing a silicon germanium (SiGe) seed layer directly on the silicon oxide layer, and depositing a germanium (Ge) layer directly on the silicon germanium (SiGe) seed layer. Semiconductor structures including a germanium (Ge) layer deposited on silicon oxide utilizing an intermediate silicon germanium (SiGe) seed layer are also disclosed.

Methods for forming a semiconductor structure and related semiconductor structures

Methods and systems for forming structures including one or more layers comprising silicon germanium and one or more layers comprising silicon are disclosed. Exemplary methods can include using a surfactant, using particular precursors, and/or using a transition step to improve an interface between adjacent layers comprising silicon germanium and comprising silicon.

Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods

A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation

An apparatus and a method for forming a 3-D NAND device are disclosed. The method of forming the 3-D NAND device may include forming a plug fill and a void. Advantages gained by the apparatus and method may include a lower cost, a higher throughput, little to no contamination of the device, little to no damage during etching steps, and structural integrity to ensure formation of a proper stack of oxide-nitride bilayers.

Apparatus and methods for plug fill deposition in 3-D NAND applications

A method for depositing a boron doped silicon germanium (SiGe) film is disclosed. The method may include: providing a substrate within a reaction chamber; heating the substrate to a deposition temperature; flowing a silicon precursor, a germanium precursor, and a halide gas into the reaction chamber through a first gas injector; flowing a boron dopant precursor into the reaction chamber through a second gas injector independent from the first gas injector; contacting the substrate with the silicon precursor, the germanium precursor, the halide gas and the boron dopant precursor; and depositing the boron doped silicon germanium (SiGe) film over a surface of the substrate.

Methods for depositing a boron doped silicon germanium film

A method for depositing a semiconductor structure on a surface of a substrate is disclosed. The method may include: depositing a first group IVA semiconductor layer over a surface of the substrate; contacting an exposed surface of the first group IVA semiconductor layer with a first gas comprising a first chloride gas; and depositing a second group IVA semiconductor layer over a surface of the first group IVA semiconductor layer. Related semiconductor structures are also disclosed.

Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures

Methods for depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber are provided. The method may include: heating the substrate to a deposition temperature of less than 550&#xb0; C.; simultaneously contacting the substrate with a silicon precursor, a n-type dopant precursor, and a p-type dopant precursor; and depositing the co-doped polysilicon film on the surface of the substrate. Related semiconductor structures are also disclosed.

Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber

A method for depositing a germanium tin (GeSn) semiconductor is disclosed. The method may include; providing a substrate within a reaction chamber, heating the substrate to a deposition temperature and exposing the substrate to a germanium precursor and a tin precursor. The method may further include; depositing a germanium tin (GeSn) semiconductor on the surface of the substrate, and exposing the germanium tin (GeSn) semiconductor to a boron dopant precursor. Semiconductor device structures including a germanium tin (GeSn) semiconductor formed by the methods of the disclosure are also provided.

Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures

In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in a substrate. The source semiconductor layer may be an amorphous or polycrystalline structure, and provides a source of semiconductor species for later diffusion into the other semiconductor material. Advantageously, such a semiconductor layer may be more conformal than an epitaxially grown, crystalline semiconductor layer. As a result, this more conformal semiconductor layer acts as a uniform source of the semiconductor species for diffusion into the semiconductor material in the substrate. In some embodiments, an interlayer is formed between the source semiconductor layer and the substrate, and then the interlayer is trimmed before depositing the source semiconductor layer. In some other embodiments, the source semiconductor layer is deposited directly on the substrate, and has an amorphous or polycrystalline structure.

Growing community of inventors

Phoenix, AZ, United States of America

David Kohen