Micron Technology Incorporated

Adesto Technologies Corporation

Ovonyx Memory Technology, LLC

Apple Inc.

David Kim

Jungtae Kwon

Sunil Bhardwaj

Foroozan Sarah Koushan

Deepak Kamalanathan

John Ross Jameson

Chuan You Su

Iii Donald Q Ross

Gomez Rodney A Angulo

An integrated circuit device can include a plurality of nonvolatile memory elements having values that vary randomly or pseudo-randomly from one another; a selection circuit configured to select a plurality of nonvolatile memory elements that vary randomly or pseudo-randomly in response to a received challenge value; and sense circuits configured to generate a response value based on the values of the selected nonvolatile memory elements. Related methods and systems are also disclosed.

Pseudo physically unclonable functions (PUFS) using one or more addressable arrays of elements having random/pseudo-random values

Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.

Techniques for reducing disturbance in a semiconductor memory device

Structures and methods for controlling operation of a programmable impedance element are disclosed herein. In one embodiment, a method of programming the programmable impedance element can include: (i) receiving a program command to be executed on the programmable impedance element; (ii) performing a program operation on the programmable impedance element in response to the program command; (iii) determining if the program operation successfully programmed the programmable impedance element; and (iv) performing an erase operation for programming the programmable impedance element in response to the program operation failing to successfully program the programmable impedance element.

Reverse program and erase cycling algorithms

Techniques for reducing disturbance in a semiconductor device

Growing community of inventors

Cupertino, CA, United States of America

David Kim