Trw Limited

David K Remnant

Timothy R Hoerig

William J Cannon

Paul D Ward

A method and apparatus for emulating instructions of a microprocessor (&ldquo;legacy instructions&rdquo;) with an incompatible instruction set which provides increased throughput relative to known emulation systems. In particular, each word of legacy memory is translated into an opcode/operand field and a dual function vector/tag field. The vector field represent addresses to legacy instruction emulation routines. The tag field is indexed to table of &ldquo;thunk&rdquo; objects, which can be used for various purposes. Such purposes include a disabling part of the legacy software, augmenting the legacy software with native software, and gathering execution statistics without modifying the legacy software.

Concurrent legacy and native code execution techniques

A method and apparatus for emulating instructions of one microprocessor ('legacy instructions') with instructions of another microprocessor with an incompatible instruction set which provides increased throughput relative to known emulation systems. In particular, the legacy instructions are translated into direct vectors to software routines for each legacy instruction. Rather than fetching the legacy instruction and interpreting the instruction in software, the emulation system and method in accordance with the present invention fetches the direct vectors to the software routines which emulate the legacy instructions. The legacy instructions can either be translated by way of software when the legacy memory is loaded or modified, or by way of hardware when legacy memory is accessed. By fetching the direct vectors, the need for software-based look-up tables for interpreting the legacy instructions is obviated. As such, the probability of cache misses is greatly reduced which increases the throughput of the system.

Growing community of inventors

Dayton, OH, United States of America

David K Remnant