Arm Limited

David John Willingham

Gus Wai-Yan Yeung

Martin Jay Kinkade

David Anthony New

Andrew John Sowden

A control device for controlling power supplied to circuitry is disclosed. The circuitry comprises a plurality of portions, each of said plurality of circuit portions being arranged between a first voltage level source and a second voltage level source, said first and second voltage level sources being adapted to output different voltage levels; said control device being adapted to control power supplied to each of said plurality of circuit portions. The control device comprises: a plurality of power switching devices corresponding to said plurality of circuit portions, each power switching device being arranged between said first voltage level source and a corresponding circuit portion such that when one of said plurality of power switching devices is switched on a voltage level close to a voltage level output by said first voltage level source is supplied to said corresponding circuit portion and said corresponding circuit portion is powered up and when switched off said corresponding circuit portion is isolated from said first voltage level source and said corresponding circuit portion is powered down, said control device further comprising: at least one voltage equalization switching device arranged between two power switching devices to provide a low resistance path between said two power switching devices when they are both turned on and to isolate said two power switching devices from each other when either are turned off.

Power gating of circuits

A multiport memoryis provided with control circuitrywhich detects signal values indicative of concurrent write and read accesses via respective bit lines of a plurality of data access ports to a common row of bit cells. When such signals are detected, an override signal is generated and supplied to override circuitry. The override circuitry is responsive to the override signal to drive one or more bit values being written to respective bit cells via their associated bit lines onto associated bit lines of other of a plurality of data access supports that are concurrently enabled for access to their bit cells. Thus, write data is also written onto the bit lines associated with a port performing a concurrent read operation.

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Ilford, United Kingdom

David John Willingham