International Business Machines Corporation

Globalfoundries Inc.

David John Russell

Donald Herman Glatzel

Voya Rista Markovich

John M Lauffer

Douglas Oliver Powell

Richard Allen Day

Joseph Paul Kuczynski

Scott B King

David L Questad

Vijayeshwar Das Khanna

Anson Jay Call

Kostas I Papathomas

Bruce John Chamberlin

Anilkumar Chinuprasad Bhatt

Allen Frederick Moring

Heike Marcello

Sri Muthuthamby Sri-Jayantha

Krishna R Tunga

Gary A Johansson

Elizabeth F Foster

Karan Kacker

John R Mertz

Charles Leon Arvin

Jeffrey Donald Gelorme

Richard Stephen Graf

David Justin West

Robert David Allen

David Brian Stone

Gregory Michael Wallraff

Krystyna Waleria Semkow

Shidong Li

Janak G Patel

Jean Audet

Mark C Lamorey

Peter Slota, Jr

Thomas E Kindl

Jeffrey P Gambino

Frank Daniel Egitto

Luis Jesus Matienzo

John Steven Kresge

Bernd Karl Appelt

William E Wilson

Irving Memis

Edmund D Blackshear

David Erle Houser

Luc Gilbert Guerin

William Dinan Hinsberg

Anthony P Ingraham

Ross William Keesler

Sudeep Mandal

Christina Marie Boyko

Raymond Thomas Galasco

Jeffrey Alan Knight

Cory J Ruud

Stephen Joseph Fuerniss

Vladimir Jakubek

Stephen Wesley MacQuarrie

Peter A Moschak

Amarjit S Rai

Hai Pham Longworth

Mark L Janecek

William T Wike

James Jens Hansen

Heike Appelt

Wolfgang Sauter

William Louis Brodsky

Sarah K Czaplewski

Stefano Sergio Oggioni

Jon Alfred Casey

Minhua Lu

Eric D Perfecto

Thomas Anthony Wassick

Sarah Huffsmith Knickerbocker

William John Rudik

Harry David Cox

Brian Michael Erwin

Gerald Walter Jones

Paul George Rickerl

Thomas P Duffy

Kevin Taylor Knadle

Jamil A Wakil

Harold Kohn

William D Hinsberg, Iii

Logan L Simpson

Karen P McLaughlin

Sylvain Pharand

Norman A Card

Stephen John Kosteva

David Michael Passante

Ronald S Malfatt

Kevin Arthur Dore

Jonathan Craig Whitcomb

Bruce J Chamberlain

Steven J Wih

Stephen J Witt

Steven Jo

Joel L Roth

Sylvie Allard

Karan C/0 Ibm United Kingdom Limited Intellectual Property Law Kacker

A glass fiber cloth includes a first warp glass fiber, a second warp glass fiber, and a weft glass fiber. The second warp glass fiber is adjacent to the first warp glass fiber. The weft glass fiber is overlaid over the first warp glass fiber and the second warp glass fiber. The weft glass fiber is attached to the first warp glass fiber.

Glass cloth including attached fibers

A laminate structure includes a conductive layer and a dielectric layer in contact with the conductive layer, the dielectric layer comprises a selectively patterned high-modulus dielectric material that balances a differential stress between the conductive layer and the dielectric layer to mechanically stiffen the laminate structure and reduce warpage.

Reduced-warpage laminate structure

A component having a coating comprising a material in a first phase (e.g., solid and/or liquid phase) with a transition temperature. The component is mechanically and/or electrically attached to a substrate. Exposure of the coating to a temperature that meets or exceeds the transition temperature causes the material to undergo a phase change. The phase change of the material alters the position of the component, including separation of the component from the substrate. The separation disrupts the attachment, thereby mitigating damage to the substrate and/or component.

Coating for limiting substrate damage due to discrete failure

An apparatus is configured with a component having a coating comprising a material in a first phase (e.g., solid and/or liquid phase) with a transition temperature. The component is mechanically and/or electrically attached to a substrate. Exposure of the coating to a temperature that meets or exceeds the transition temperature causes the material to undergo a phase change. The phase change of the material alters the position of the component, including separation of the component from the substrate. The separation disrupts the attachment, thereby mitigating damage to the substrate and/or component.

An apparatus is provided with a component configured to be operatively coupled to an interface. In a first state, the component is mechanically and/or electrically attached to a substrate. Exposure of the interface to a thermal event that meets or exceeds a first temperature the resilient material is subject to undergo a state change to a second state. The state change includes a physical transformation of the interface, and includes a position change of the component.

Interface for limiting substrate damage due to discrete failure

An electrical contact upon an interposer and/or upon a processing device includes a minor axis and a major axis. The contact is positioned such that the major axis is generally aligned with the direction of expansion of the interposer and/or the processing device. The electrical contact may further be positioned within a power/ground or input/output (I/O) region of the interposer and/or processing device. The electrical contact may further be positioned within a center region that is surrounded by a perimeter region of the interposer and/or the processing device. The dimensions or aspect ratios of major and minor axes of neighboring electrical contacts within an electrical contact grid may differ relative thereto. Further, the angle of respective major and minor axes of neighboring electrical contacts within the electrical contact grid may differ relative thereto.

Method of fabricating contacts of an electronic package structure to reduce solder interconnect stress

A first electrical contact and second contact is upon an interposer and/or upon a processing device. The first contact includes a minor axis and a major axis. The second contact includes diameter axes. The first contact is positioned such that the major axis is generally aligned with the direction of expansion of the interposer and/or the processing device. The first electrical contact may further be positioned within a power/ground or input/output (I/O) region of the interposer and/or processing device. The first electrical contact may further be positioned within a center region that is surrounded by a perimeter region of the interposer and/or the processing device. The dimensions or aspect ratios of major and minor axes of neighboring first electrical contacts within an electrical contact grid may differ relative thereto. Further, the angle of respective major and minor axes of neighboring first electrical contacts within the electrical contact grid may differ relative thereto.

Reduction of solder interconnect stress

An apparatus is provided with a component configured with an interface comprising a resilient material. In a first state, the component is mechanically and/or electrically attached to a substrate. Exposure of the interface to the temperature that meets or exceeds the transition temperature of interface causes the resilient material to undergo a state change. The state change of the interface alters the position of the component, including separation of the component from the substrate. The separation disrupts the attachment thereby mitigating damage to the substrate and/or component.

In some embodiments, methods include drilling one or a plurality of PTHs with any industrial grade drill to fabricate holes with positive etch back, flooding the PTHs with a dilute solution of an acrylate monomer/oligomer containing an appropriate level of peroxide initiator, polymerizing the acrylate, and then rising the PTHs with the solvent used in the formulation of the acrylate material. In one embodiment, the printed circuit board may include a substrate comprising a plurality of metal layers separated by a plurality of insulating layers; a plurality of plated through holes formed in the substrate, each plated through hole comprising: recesses formed at each insulating layer, copper lands between the recesses, a polymer coating in each recess, and a metal layer lining the plated through hole.

Printed circuit board and methods to enhance reliability

Method of designing a laminate substrate having upper laminate layers and an equal plurality of lower laminate layers including: dividing the laminate substrate into regions having corresponding laminate layer pairs consisting of an upper laminate layer and a lower laminate layer; calculating a net stretching value for each corresponding laminate layer pair in each region to result in net stretching values in each region; summing the net stretching values in each region to result in a net stretching value for each region proportional to a curvature of each local region; calculating a relative out-of-plane displacement for the laminate substrate from the curvature of each local region; calculating a predicted thermal warpage for the laminate substrate; and finalizing a design of the laminate substrate when the predicted thermal warpage is within a predetermined acceptable range.

Laminate substrate thermal warpage prediction for designing a laminate substrate

In some embodiments, methods include acquiring a micrograph image of a plated through hole and converting the micrograph image to a binary image. Methods include defining a pixel line at a copper-dielectric material interface of the binary image. In some embodiments, methods include comparing a length of an interface line compared to a length of a portion to determine a roughness of the pixel line. In some embodiments, methods include determining a roughness of the hole wall before copper plating. Methods may include determining a roughness of the interface using the pixel line.

Image analysis methods for plated through hole reliability

The present invention relates generally to integrated circuit (IC) chip packaging, and more particularly, to a structure and method of forming a glass interposer having one or more embedded peltier devices, alongside electrically conductive vias, to help dissipate heat from one or more IC chips in a multi-dimensional chip package through the glass interposer and into an organic carrier, where it can be dissipated into an underlying substrate.

Glass interposer with embedded thermoelectric devices

An approach is provided in which a laminate substrate includes top layers, bottom layers, and a core layer. The top layers are positioned between the core layer and a top surface metallurgy (TSM) layer and include at least one top conductive layer. The bottom layers are positioned between the core layer and a bottom surface metallurgy (BSM) layer and include at least one bottom conductive layer includes a material void pattern that is based upon the top conductive layer and reduces warpage of the laminate substrate.

Copper feature design for warpage control of substrates

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Owego, NY, United States of America

David John Russell