International Business Machines Corporation

Wisconsin Alumni Research Foundation

David John Palframan

Malcolm Scott Allen-Ware

Srinivasan Ramani

Nam Sung Kim

Ken Van Vu

Heather Lynn Hanson

Mikko Herman Lipasti

A computer architecture addresses intermittent memory faults by exploiting redundancy inherent in a hierarchical memory structure, for example, as data moves through various cache levels and registers before use by the processor. Accesses to data from faulted memory areas is diverted to a secondary memory structure holding that data and the secondary memory structure is flagged to increase the persistence of the stored data used for patching against normal updating policies.

Memory fault patching using pre-existing memory structures

A mechanism is provided for optimizing energy efficiency in a set of processor cores while maintaining application performance for a set of applications. A quality of service (QoS) level is received for one or more active applications in the set of applications and state information associated with each processor core in the set of processor cores is identified. Responsive to the QoS level and the state information indicating an action to be implemented, a change is implemented to reduce power utilization by one or more processor cores in the set of processor cores in the data processing system, where the change is via at least one of dynamic frequency scaling, dynamic voltage scaling, or core folding.

Energy efficient optimization in multicore processors under quality of service (QoS)/performance constraints

Hardening of an integrated circuit such as a GPU processor to soft errors caused by particle strikes is applied selectively to the set of devices according to the magnitude of error resulting from this soft error for the particular device. This approach differs from approaches that protect all devices, all devices likely to produce an output error, or all devices that are vulnerable.

Method and apparatus for soft error mitigation in computers

Growing community of inventors

Madison, WI, United States of America

David John Palframan