The United States of America As Represented by the National Security Agency

The United States of America As Represented by the National Security

The Government of the United States As Represented by the Director, National Security Agency

Other

The United States of America As Represented by the Director of the National Security Agency

U.S. Government As Represented by the Director, National Security Agency

The Uniteed States of America As Represented by the Director of National Security Agency

David Jerome Mountain

Richard Lee Ammlung

John James Hudak

A computer processor includes an on-chip network and a plurality of tiles. Each tile includes an input circuit to receive a voltage signal from the network, and a crossbar array, including at least one neuron. The neuron includes first and second bit lines, a programmable resistor connecting the voltage signal to the first bit line, and a comparator to receive inputs from the two bit lines and to output a voltage, when a bypass condition is not active. Each tile includes a programming circuit to set a resistance value of the resistor, a pass-through circuit to provide the voltage signal to an input circuit of a first additional tile, when a pass-through condition is active, a bypass circuit to provide values of the bit lines to a second additional tile, when the bypass condition is active; and at least one output circuit to provide an output signal to the network.

General purpose neural processor

Method of making an organic flexible integrated circuit includes providing a rigid substrate, such as a silicon wafer, and providing alternating layers of thin film conductors and dielectrics to thus yield interconnect layers including a flexible substrate on the rigid substrate to yield a high density interconnect. Further, the method includes fabricating an organic transistor, and connecting the organic transistor to the high density interconnect to form an organic integrated circuit including the flexible substrate. Then, the rigid substrate and the flexible substrate may be attached to a support. The integrated circuit attached to the rigid and flexible substrates may be tested prior to this attachment. Then the rigid substrate may be removed from the flexible substrate, such as by a destructive. The integrated circuit may be tested gain at this point. The organic integrated circuit may then be released from the support to yield a flexible integrated circuit.

Method of fabricating a flexible organic integrated circuit

The present invention is a method of aligning components on a flexible integrated circuit. First a rigid substrate is selected. Next a flexible interconnect is deposited on the substrate, the interconnect preferably consisting of alternating polyimide and metal layers. After depositing the interconnect on the substrate, solder bumps are applied to the interconnect. Next, attach electronic components to the interconnect. A second substrate is then attached to the electronic components. Then, remove the first substrate to expose the interconnect. Last, the second substrate is removed to release the integrated circuit module.

Method of precisely aligning components in flexible integrated circuit module

Method of making an integrated passive, such as a high quality decoupling capacitor, includes providing a first temporary support, a silicon capacitor wafer, and providing an oxide layer and a conductive layer on it. Then, a second temporary support, such as a handle wafer, may be attached to the capacitor wafer (i.e., to the oxide layer on it) by an adhesive bond. The capacitor wafer may then be destructively removed. A second conductive layer is then provided on an exposed backside of the oxide layer. The addition of a second electrode on the second conductive layer yields the desired high quality capacitor. Further processing steps, such as solder bumping, may be carried out while the capacitor wafer is still attached to the handle wafer. When the desired processing steps are complete, the handle wafer is removed, and the relatively thin high quality integrated capacitor wafer results.

Method of fabricating and integrating high quality decoupling capacitors

Method of making a bumped thinned circuit wafer includes providing a silicon circuit wafer, and providing a conductive layer on it. Then, a first temporary support, such as a handle wafer, may be attached by an acrylic bond. The circuit wafer may then be thinned to a desired thickness, and the thinned circuit attached to a second temporary support, such as a transfer wafer. The handle wafer is removed, the thinned circuit wafer is bumped, and further processing steps may be carried out while the bumped thinned circuit wafer is still attached to the transfer wafer. When the desired processing steps are complete, the transfer wafer is removed, and the thinned circuit wafer with relatively thick solder bumps results.

Method for bumping a thin wafer

The present invention is a method of fabricating a semiconductor device using a fully cured BCB layer and removing the same using wet etching. The first step is selecting a substrate. The second step of the method is producing an oxide layer or other coating on the substrate. The third step is applying a BCB layer on the oxide layer. The fourth step is fully curing the BCB layer. The fifth step is processing the device. The sixth step is stressing the substrate, preferably causing the substrate to warp. The seventh step is wet etching the BCB layer. The eighth step is removing the BCB layer. The ninth step is removing the oxide layer.

Fabricating a semiconductor device using fully cured bisbenzocyclobutene

A method of thinning a product wafer using equipment designed for a wafer diameter, where the diameter of the product wafer is smaller than the wafer diameter of the thinning equipment by cutting an opening in a template wafer, where the template wafer is of a diameter that may be thinned by the thinning equipment, and where the opening accommodates the product wafer; affixing the template wafer to a holding material; affixing the product wafer to the holding material and inside of the template wafer with the integrated circuit side up; depositing an etch stop onto a handle wafer, where the handle wafer is at least as large as the template wafer; bonding adhesively the product wafer to the etch stop; removing the holding material; filling any gaps between the product wafer and the template wafer; using wax to make the product wafer sufficiently planar; thinning the product wafer using the thinning equipment; removing any excess wax; bonding adhesively the product wafer to a transfer wafer, where the transfer wafer is at least as large as the template wafer; removing the handle wafer; removing the etch stop; and removing any adhesive that remains on the product wafer.

Method of thinning semiconductor wafer of smaller diameter than thinning

A method of thinning integrated circuits in die form including acquiring a handle wafer; depositing an etch stop material on the handle wafer; coating an adhesive layer onto the etch stop material; acquiring a template wafer; cutting an opening through the template wafer; placing dice onto the adhesive layer of the handle wafer; bonding the template wafer onto the handle wafer; filling any gaps with adhesive material; thinning the resulting structure; acquiring a transfer wafer; coating an adhesive layer onto the transfer wafer; bonding the transfer wafer to the resulting structure; removing the handle wafer; removing the etch stop material; removing any remaining adhesive material; testing electrically the thinned dice; recording which of the thinned dice are functional; dicing the transfer wafer into portions; holding temporarily the portions; removing the transfer wafer from the portions; and packaging the thinned dice.

Method of thinning integrated circuits received in die form

A method of making a multi-chip module by thinning individual integrated circuit die or an integrated circuit wafer containing multiple integrated circuits; bonding thinned dice or a thinned wafer to a mylar, polyimide, semiconductor, or ceramic substrate; depositing at least one interconnect material over the wafer, where the first interconnect layer is deposited directly over the wafer; depositing a dielectric layer over each of the interconnect layers; opening vias in the dielectric layers in order to interconnect the dice and multi-chip module as required; and removing the substrate to form a thin, conformal, and high-yielding multi-chip module.

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Baltimore, MD, United States of America

David Jerome Mountain