Brooktree Corporation

Conexant Systems, Inc.

David J Wicker

Benjamin E Felts, Iii

Sanjay K Jha

Gregory C Parrish

Douglas D Moran

Keith A Jack

An apparatus and method for detecting the presence of a display device at the output of a video driver utilizes a terminating resistance connected between the output of the video driver and a ground level. A current is driven by the video driver, resulting in a voltage level at the output. A comparator compares the resultant voltage to a reference voltage signal to determine whether the resultant voltage is above or below a predefined threshold. The threshold is chosen as lying between an anticipated resultant voltage for a video driver having a display device connected thereto and an anticipated resultant voltage for a video driver without a display device connected thereto.

Method and apparatus for detection of a video display device

An apparatus and method for converting pixel data from a computer video format to a television-compatible composite video waveform. A color space converter converts RGB or YCrCb pixel data into YUV pixel data. The YUV pixel data is supplied to an encoder which encodes the data into a composite video waveform. A clock generator generates an encoder clock frequency based on the horizontal resolution of the incoming computer pixel data. The encoder clock frequency is sufficient to allow encoding of all incoming pixels in the active video portion of the waveform without physically scaling or altering the pixel data. Sync and burst processors in the encoder encode sync pulses and burst waveforms at proper timing intervals despite the variable encoder clock frequency by accessing sync pulse and burst waveform values and timing parameters appropriate to ranges of clock frequencies that are stored in a ROM.

Method and apparatus for horizontally scaling computer video data for display on a television

Successive pixels representing video data in successive lines in a raster scan are buffered. Each of the lines has a sync pulse defining the line beginning. A phase adjustment is determined between the sync pulse, preferably at a particular level in the sync pulse, and an adjacent one of system adjacent clock signals at a particular frequency. The actual or expected phase adjustment between the pixels at the end of each line is also determined. The difference between the phase adjustments at the beginning and end of each line is then determined. Progressive adjustments are made in the phase of each successive pixel in the line relative to the system clock signals in accordance with the number of system clock signals in the line and the determined difference in the phase adjustment between the line beginning and end. In this way, the pixels of video data are synchronized with the system clock signals. When the actual phase adjustment relative to the system clock signals is determined at the end of each line, the difference in the phase adjustments at the beginning and end of such line is determined from the phase adjustment for such line and the phase adjustment stored for the previous line. When the expected phase adjustment is provided for the end of each line, this estimated value is altered for each line by an amount equal to the actual phase adjustment at the beginning of such line and the estimated phase adjustment at the end of such line.

Method to synchronize video modulation using a constant time base

A system converts PAL and NTSC pixel clock signals to signals (in a studio, digital or square pixel format) at a sub-carrier frequency individual to the and NTSC formats. The system includes a first register for providing a particular increase in the register count upon each occurrence of a pixel clock signal. Any remainder in the first register upon the production of the output signal is introduced to the register upon the occurrence of the next pixel clock signal. The particular increase in the first register count is controlled by a value in a second register, this value being adjustable dependent upon the system format and mode. A sequence of registers may be substituted for the first register with each register receiving an output from the previous register in the sequence. The system also converts signals representing the primary colors to luminance and chrominance signals. The luminance and chrominance signals are processed to produce a control signal having characteristics dependent upon the cumulative intensity of the luminance and chrominance. The control signal is used to vary the amplitude of the chrominance signals so that the chrominance intensity does not increase above or decrease below a problematic level at any instant.

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Poway, CA, United States of America

David J Wicker