Gte Automatic Electric Labs Inc.

At&t Bell Laboratories

Gte Automatic Electric Laboratories Incorporated

At&t Information Systems Inc.

David J Stelte

Donald W McLaughlin

Stig E Magnusson

Sergio E Puccini

Nathaniel Simmons

Alex W Kobylar

Michael J Kelly

Robert L Lindsay

James M Johnson, Jr

John B Sharp

George W Schramm

Mark G Hinch

Richard P Marzec

David M Tutelman

Henry J Kafka

Jean Chu

A data communication method and circuitry which uses a compatible subset of a standard high level data link control (HDLC) protocol to control link level communication between a digital terminal and a switch. The use of the subset of HDLC protocol reduces the complexity of the digital terminal design while maintaining communication compatibility with a switch which uses either the standard HDLC protocol or the subset of HDLC protocol.

Data communication method and circuitry

A communication method and digital multi-customer data interface for interconnecting a number of customer terminals to a main packet switching network of a local area data transport system that provides data communication services such as interactive video text service between data service vendors and customers. The digital multi-customer interface utilizes a main processor, control circuit, and multi-customer protocol controller to implement the protocol functions for the communication of packets and control information over individual serial transmission paths. The multi-customer protocol controller comprises a control processor and a formatter circuit for synchronously communicating packets for a plurality of customer terminals via customer line units and customer lines. The control processor performs byte-to-packet and packet-to-byte functions between the main processor and the formatter circuit. The formatter circuit is shared in common by all of the customer lines and performs the functions of assembling and disassembling data bytes from and to individual data bit signals, performing error cyclic redundancy checks and generations, performing flag recognition and generations, and performing bit stuffing and unstuffing. The control circuit handles communication of all control and status information between the main processor and the customer line units. The control buffer periodically transmits the control information received from the main processor to all of the customer units and receives back from them status information which is stored for later use by the main processor.

Digital multi-customer data interface

A 4 KHz channel is used for communication between a processing unit associated with a satellite telephone office and a processing unit associated with a connected class 5 telephone office. A data link circuit is connected to the processing unit of the satellite office and operates to transmit data communications between the processing unit of the satellite office and the class 5 telephone office via the 4 KHz channel.

Digital satellite telephone office

A duplex time-space-time switching network is shown in which there is a multiple crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the originating and terminating time switching stages but remain segregated throughout the space switching stage.

Dual rail time and control unit for a duplex T-S-T-digital switching

A time-space-time switching network is shown in which there is a crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the terminating time switching stage but remain segregated throughout the space switching stage and the originating time switching stage.

Dual rail time and control unit for a T-S-T-digital switching system

A duplex time-space-time switching network is shown in which there is a crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the originating time switching stage but remain segregated throughout the space switching stage and the terminating time switching stage.

A duplex time-space-time switching network is shown in which there is a crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the terminating time switching stage but remain segregated throughout the space switching stage and the terminating time switching stage.

A time-space-time switching network is shown in which there is a multiple crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in either or both the originating and terminating time switching stages but remain segregated throughout the space switching stage.

Signals from line circuits requesting service are transferred to a T1 channel via a Pulse Amplitude Modulated (PAM) bus. The number of line circuits which can be served by a T1 line is not limited by the capacity of the T1 line since the probability of all line circuits requesting service at the same time is extremely low. A processing unit detects requests for service and assigns them a slot in a memory which defines the scanning sequence for insertion of line circuit signals in the T1 channel.

Digital concentrator for use with a digital telephone office

Common digital line circuits are used in a digital telephone office to provide supervisory and digital conversion functions for any subscriber station connected to a digital telephone office. Subscriber stations are connected to specialized analog line circuitry via an analog access network when required.

Analog access arrangement for a digital telephone office

Pulse Code Modulation (PCM) line circuits include analog and PCM processing circuitry. These circuits are separated into an analog line circuit portion and a PCM processing circuit portion. An analog network is connected to the analog line circuits and provides concentration to a minimal number of PCM processing circuits.

Arrangement for concentrating pulse code modulation processing circuits

A circuit which allows a digital network telephone central office to provide coin telephone service without analog-to-digital converters. This circuit controls the transmission of digital data representative of coin telephone control signals. Shift registers are used to store this data for asynchronous transmission to a coin telephone, under control of gating logic circuits which insert one bit periodically in preselected frames of data sent to a coin telephone.

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Lombard, IL, United States of America

David J Stelte