International Business Machines Corporation

David J Levitt

Eli Arbel

Oded Fuhrmann

Cynthia Rae Eisner

Gadiel Auerbach

Alexander Itskovich

Viresh Paruthi

Fady Copty

A reference model may be defined to refer to a matrix of a target computerized system. The reference model may comprise a reference index and a reference matrix. The reference index may have a non-deterministic value enabling the reference matrix to refer to the matrix using a fewer number of cells. The disclosed subject matter may enable a more efficient model checking process of a computerized device by using a reference model that is relatively easy to define or maintain or by using a reference model that is configured to be more efficient for model checking as it uses non-determinism.

Modeling a matrix for formal verification

A mechanism is provide for formally verifying random priority-based arbiters. A determination is made as to whether a random priority-based arbiter is blocking one of a set of output ports or a set of input ports. Responsive to the first predetermined time period expiring before the processor determines whether the random priority-based arbiter is blocking, a determination is made as to whether the random priority-based arbiter is blocking one of the set of output ports or the set of input ports within a second predetermined time period using the random seed and at least one of property strengthening or underapproximation. Responsive to the processor determining that the random priority-based arbiter satisfies a non-blocking specification such that not one of the set of output ports or the set of input ports is blocked within the second predetermined time period, the random priority-based arbiter is validated as satisfying the non-blocking specification.

Formal verification of random priority-based arbiters using property strengthening and underapproximations

A system for clustering Boolean functions for clock gating according to various exemplary embodiments can include a computer configured to identify at least two small gating groups within a clock tree representative of an electrical network and at least two gating functions of the at least two small gating groups, wherein the at least two gating functions are Boolean functions; perform hierarchical clustering on the at least two gating functions using a similarity measure that describes a distance between the at least two gating functions such that the clustering forms a merge function of a cluster generated and displayed in a form of a dendrogram; assign to each gating domain a merit value according to a power consumption profile of the gating domain using a merit function; and partition the cluster into gating groups using the dendrogram to construct a directed acyclic graph to determine a partition which maximize the overall power saving.

Device to cluster Boolean functions for clock gating

A method to cluster Boolean functions for clock gating according to various exemplary embodiments can include identifying at least two small gating groups within a clock tree representative of an electrical network and at least two gating functions of the at least two small gating groups, wherein the at least two gating functions are Boolean functions; performing hierarchical clustering on the at least two gating functions using a similarity measure that describes a distance between the at least two gating functions such that the clustering forms a merge function of a cluster generated and displayed in a form of a dendrogram; assigning to each gating domain a merit value according to a power consumption profile of the gating domain using a merit function; and partitioning the cluster into gating groups using the dendrogram to construct a directed acyclic graph to determine a partition which maximize the overall power saving.

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Haifa, Israel

David J Levitt