Alcatel Lucent

David Henry Graham

Toby James Koktan

Robert Morton

James Wisener

Saida Benlarbi

David Stortz

David Motz

Desmond Glenn Smith

Terrence Vincent Sellars

Stephen Michael Shortt

Christopher Edward Trader

Myles Kevin Dear

Thomas Man Chun Kam

The apparatus and method herein provide a means for actively monitoring a communications node for datapath disruptions caused within the node. It was developed to address linecard failures that were detected in the field and for which traditional error detection mechanisms such as CRC and OAM CC checks are not feasible. According to one implementation, statistics are collected over a preset time interval. If any egress cell counts are zero over a full interval, then the ingress interface for that datapath is determined, e.g. using the node's cross-datapath information, and the corresponding linecard of that ingress interface is contacted to determine the ingress cell count. If the ingress cell count is non-zero then the datapath is alarmed since the complete lack of cells transmitted at the egress indicates a datapath disruption. Other implementations that can detect datapath disruptions without a complete interval of statistics collection and which do not require a zero egress cell count are possible for cases where congestion, linecard resets, etc. can be ruled out.

Silent datapath failure detection

Apparatus and methods for autonomously identifying and mitigating soft-errors affecting integrated circuit memory storage devices are provided. A soft-error mitigation process is invoked upon finding that an integrated circuit memory device is affected by a parity error. In a staged approach, unused memory regions of the integrated circuit memory device are reinitialized; if a redundant deployment prevails, the subsystem corresponding to the affected integrated circuit memory device is reset; memory regions having copies of contents thereof stored at remote locations are rewritten with obtained copies of the contents; and memory regions storing contents which are generated at run-time are reinitialized. Directed parity error scans are employed at each stage. If the parity error persists, one of the apparatus, and the subsystem corresponding to the affected silicon memory device is reset during a maintenance window. Advantages are derived from a run-time soft-error mitigation process which increases availability, and reduces maintenance overheads and the need for hardware replacement.

Autonomous method and apparatus for mitigating soft-errors in integrated circuit memory storage devices at run-time

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Kanata, Canada

David Henry Graham