Snap Appliance, Inc.

David H Barry

John R Staub

Gregory D Bolstad

George W Priester

Leonard D Olsen

Danny Lam

Ronald K Godshalk, Jr

Thomas R Ulrich

Jay G Randall

James R Schweitzer

A programmable data path accelerator is described. The programmable data path accelerator operates on a file server that includes a network interface for communicating with one or more clients. The network interface includes a network transaction queue. A metafile processor is configured to communicate with the network interface across a first memory-mapped bus and is configured to communicate with the storage interface across a second memory-mapped bus. A data engine configured to communicate with the network interface across the first memory-mapped bus and to communicate with the storage interface across the second memory-mapped bus.

Data engine with metadata processor

A data interface architecture is described. The data interface architecture includes a network-side interface for communicating with a first bus and a storage-side interface for communicating with a second bus. The data interface architecture further includes a first data cache and a second data cache. The data interface architecture further includes a first parity engine, which is configured to perform parity operations for data transactions between the network-side interface and the first data cache, and a second parity engine, which is configured to perform parity operations for data transactions between the storage-side interface and the first data cache. The data interface architecture further includes a third parity engine, which is configured to perform parity operations for data transactions between the network-side interface and the second data cache, and a fourth parity engine, which is configured to perform parity operations for data transactions between the storage-side interface and the second data cache. The data interface architecture further includes control logic that is configured to manage the data transactions between the network-side interface and the first data cache, data transactions between the network-side interface and the second data cache, data transactions between the storage-side interface and the first data cache, and data transactions between the storage-side interface and the second data cache.

Interface architecture

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Placentia, CA, United States of America

David H Barry