Control Data Corporation

David H Allen

Michael F Maas

Daniel J Baxter

Don A Daane

Judy L Teske

Brian D Borchers

This application describes a peripheral cell structure for VLSI chips that requires the use of standard cells having both input and output capability connected to nearly all of the signal carrying pins. The cells function is alterable (to input or output and to where the data input signals originate) by control signals which may originate with a control register. The clock input signal is split into two independent signals to selectively disable the input or output registers, thus allowing the control register to be changed without affecting the contents of the other two registers. An early signal is also provided to prepare for mode changes.

Flexible VLSI on-chip maintenance and test system with unit I/O cell

An improved ring oscillator for VLSI chips is shown, formed at the chip periphery. It may have specific initiation gates and have additional parasitic capacitance added to the ring to enhance accuracy. The circuit elements used for the ring are the same as those used for more centralized circuits.

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Eagan, MN, United States of America

David H Allen