Lucent Technologies Inc.

Lattice Semiconductor Corporation

Touchsensor Technologies, LLC

David Gradl

Michael L Steinberger

Mark Robert Mathews

Courtney Heron

A touch panel includes first and second sets of electrodes separated by a dielectric and oriented so that the electrodes of the first set intersect with the electrodes of the second set without touching. Each of the electrodes can be made of a plurality of individual conductors shorted together. The conductors can be provided in the form of flat cable or clockspring material.

Electrode structure with spatial interpolation for capacitive touch panel

Systems and methods are disclosed herein to provide signal monitoring techniques. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a phase detector circuit that receives an input signal and samples the input signal to provide binary state signals. A signal monitoring circuit decodes the binary state signals and provides at least one output signal indicating for the input signal path equalization and/or duty cycle distortion.

Signal monitoring systems and methods

Systems and methods are disclosed for sharing a transmission line among different interface technologies. For example, in accordance with an embodiment of the present invention, two different high-speed differential interface technologies (CML and LVDS) share a communication channel.

Shared transmission line communication system and method

A high speed digital signal connection interface with reduced cross talk includes a multiple pin connector with disconnectable header and receptacle portions. The header is attached to a first set of signal carrying wire pairs communicating with a first signal processing unit. The receptacle is attached to a second set of signal carrying wire pairs communicating with a second signal processing unit. Within each of the first and second wire pair sets is a first wire pair subset carrying digital signals travelling in a first direction between the signal processing units, and a second wire pair subset carrying digital signals travelling in a second direction between the signal processing units. The first and second wire pair sets are attached to the corrector such that adjacent pin pairs of the connector carry only signals travelling in the same direction and such that connector pin pairs carrying signals travelling in opposite directions are not adjacent to each other. An impedance matching circuit is provided for each signal-carrying wire pair of the first and second wire pair sets. Each impedance matching circuit has a first side connected to one of the signal processing units and a second side connected to one of the wire pairs at an impedance that substantially matches the wire pair impedance. The impedance matching circuits that connect to wire pairs carrying outgoing signals from a signal processing unit provide driver end impedance matching, and the impedance matching circuits that connect to wire pairs carrying incoming signals to a signal processing unit provide receiver end impedance matching.

High density multiple digital signal connection interface with reduced cross talk

A test system for a evaluating a digital signal link includes a data signal generator, a data signal receiver, a digital signal link to be tested and a test interference signal injection (TISI) network connected as part of the digital signal link. The TISI network includes a data signal input port for receiving digital data signals generated by the data signal generator, a data signal output port for providing the digital data signals to the data signal receiver, and a controlled impedance data signal path carrying the digital data signals between the data signal input port and the data signal output port. An interference signal input port receives interference signals over a range of frequencies from an interference signal generator. One or more directional couplers directionally couple the interference signals into the data signal path toward either the data signal output port or the data signal input port at an impedance that substantially matches the impedance of the digital signal link. The directional couplers are configured to maintain d.c. isolation from ground to facilitate the transfer of d.c. coupled data signal logic through the TISI network.

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Naperville, IL, United States of America

David Gradl