Deutsche Itt Industries Gmbh

Deutsche Thomson-brandt Gmbh

Laboratoire European De Researches Electronique Avancees

Laboratoire Europeen De Recherches Electroniques Advancees Societe En

David Gillies

Albrecht Rothermel

Rainer Schweer

John Stolte

Jean-Yves Moraillon

Mark Watson

When processing a digital video signal, the problem often arises of converting the signal from a first sampling raster which is asynchronous with respect to the line interval to a second sampling raster which synchronous with the line interval. Interpolation filters are used for this purpose. The present invention provide a simple method for the conversion which does not require intermediate D/A or A/D conversion. For each line of the input signal, the phase of samples of the first sampling raster relative to the line synchronization pulse and the total number of the samples for this line are determined and are used to control of the interpolation filter.

Method and apparatus for converting the sampling rates of a digital

A device for conversion of frame frequency and number of lines for a high-definition television receiver which receives input video signals corresponding to different standards and to output a high-definition signal at a desired frame frequency and with the desired number of lines. The device uses a pass-band reduction decoder processing the high-definition input 625/2:1/50 Hz video signals. It includes: a memory, a decoder, and a processing circuit. The memory stores the input video signal frames at a frequency which is a function of the frame frequency of the input signal. This memory is read at the frame frequency desired at the output. The decoder is a pass-band reduction decoder connected to the memory and gives separately at its outputs even and odd frames, respectively, of a decompressed high-definition video signal output at the frame frequency desired. The video processing circuit is connected to the outputs of the pass-band reduction decoder and delivers a display video signal at the required frame frequency and number of lines.

Device for conversion of frame frequency and number of lines for a

Disclosed is a device to convert a piece of motion information into a motion information signal at the field rate and with the number of lines desired for a high-definition television receiver. This device comprises:

Device for the conversion of motion information into a motion

This demultiplexing circuit serves to 'decode' a multiplex signal (m) formed by the formula m=ns.sub.1 +s.sub.2 from two digital signals (s.sub.1, s.sub.2) which are so redundant as to each represent an analog signal by only n amplitude levels instead of 2.sup.p maximum possible levels, where p is the respective number of bits in the digital signals, and n satisfies the relation: 2log.sub.2 n is less than or equal to 2p-1. The circuit includes an iterative array of cells each comprising an adder, a switch, and two delay elements. The output of the final stage of the iterative array provides the second digital signal. By means of inverters and shift registers, the first digital signal is derived from the carry signals of the adders.

Demultiplexing circuit for a multiplex signal

A data compander for digital video signals wherein the sampling frequency is locked to the chrominance-subcarrier frequency. The data compander includes the following cascaded subcircuits: a lock-mode-changing filter which changes the lock of the video signals with the chrominance subcarrier into signals whose clock frequency is locked to the line frequency; an (a/b)-decimation filter, where a, b are integers, and a is less than b; a first peaking filter; a utilization circuit for the line-locked signals; a (b/a)-interpolation filter; a lock-mode-reversing filter which changes the lock of the signals with the line frequency; and a second peaking filter.

Data compander for digital video signals

A control circuit includes a data reduction decoder and an interpolating filter, the data reduction decoder having an line memory for the video signal included in a scanning line. The interpolating filter cooperates with the line memory and includes a first adder, a subtracter, a first and a second multiplier, and a second adder. The control circuit controls the writing of digital signals of a field corresponding to any of the conventional television standards into a memory array and the readout of digital signals at an increased field rate, preferably at twice the field rate.

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Strasbourg, France

David Gillies